The PCI-T32 implements a target PCI interface compliant with the PCI 2.3 specification.
- PCI
CAST is a silicon intellectual property (IP) developer, aggregator, and integrator providing IP cores and subsystems since 1993.
Our product line features both leading-edge and standards-based digital IP, including compression engines and image processing functions; 8051 microcontrollers and low-power 32-bit BA2X™ processors; industry-leading automotive interfaces; a complete family of SoC security modules; and a variety of peripherals, interfaces, and other IP cores.
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Our product standards and business practices have been uniquely honed through successful projects with hundreds of systems designers since the very beginnings of the IP industry, making CAST one of the best IP partners available.
The PCI-T32 implements a target PCI interface compliant with the PCI 2.3 specification.
TSN Ethernet Endpoint Controller
The TSN-EP implements a configurable controller meant to ease the implementation of endpoints for networks complying to the Time …
Lossless & Near-Lossless JPEG-LS Encoder
The JPEG-LS-E core implements a efficient, low-power, lossless and near-lossless image compression engine that is compliant to th…
Lossless & Near-Lossless JPEG-LS Decoder
The JPEG-LS-D core implements a efficient and low-power, lossless and near-lossless image decompression engine that is compliant …
MIPI SPMI Controller or Target
The SPMI-CTRL core implements a featured, easy-to-use controller for the MIPI System Power Management Interface (MIPI-SPMI) bus.
xSPI, HyperBus™, and Xccela™ Serial Memory Controller
The xSPI-MC core is a versatile serial/SPI memory controller, which allows a system to easily detect and access the attached memo…
AES-XTS Storage Encrypt/Decrypt Engine
The AES-XTS encryption IP core implements hardware encryption/decryption for sector-based storage data.
The Geon™ Secure Execution Processor is a low-power, 32-bit processor IP core with built-in protection of sensitive code and data.
40G/50G UDP/IP Hardware Protocol Stack
Implements a UDP/IP hardware protocol stack that enables high-speed communication over a LAN or a point-to-point connection.
H.264 High 10 Intra Profile Encoder
The H264-E-HIS IP core is a video encoder compliant to the High 10 Intra profile of the ISO/IEC 14496-10/ITU-T H.264 standard.
Motion JPEG Over IP – HD Video Encoder Subsystem
This Video Over IP Subsystem employs JPEG compression and RTP/UDP/IP encapsulation to enable the rapid development of motion JPEG…
Hardware RTP Stack for JPEG Stream Encapsulation
Implements a Real Time Transport Protocol (RTP) hardware stack that encapsulates JPEG streams to RTP packets compliant with RFC 2…
The CACHE-CTRL IP core is a flexible cache memory controller providing a 32-bit slave processor interface and a 32-bit master int…
H.264 Video Over IP – HD Decoder Subsystem
This Video Over IP Subsystem integrates H.264 Decompression, Transport Stream and RTP/UDP/IP de-capsulation to enable the rapid d…
H.264 Video Over IP – HD Encoder Subsystem
This Video Over IP Subsystem integrates H.264 compression, Transport Stream and RTP/UDP/IP encapsulation to enable the rapid deve…
SHA-3 Secure Hash Crypto Engine
The SHA-3 is a high-throughput, area-efficient hardware accelerator for the SHA-3 cryptographic hashing functions, compliant to N…
256-bit SHA Secure Hash Crypto Engine
The SHA-256 encryption IP core is a fully compliant implementation of the Message Digest Algorithm SHA-256.
Message Digest Algorithm Processor
The MD5 encryption IP core is a fully compliant hardware implementation of the Message Digest Algorithm MD5, suitable for a varie…
The KEXP IP core performs AES key expansion, and is an option for the AES, AES-P, AES-CCM and AES-GCM cores.
AES-CCM Authenticated Encrypt/Decrypt Engine
The AES-CCM encryption IP core implements hardware Rijndael encoding and decoding in compliance with the NIST Encryption Standard.