H.264 Video Over IP – HD Decoder Subsystem

This Video Over IP Subsystem integrates H.264 Decompression, Transport Stream and RTP/UDP/IP de-capsulation to enable the rapid development of complete video streaming products. Hardware reference designs and customization services complete the solution.

The subsystem uses the Low-Latency AVC/H.264 Baseline Profile Decoder Core and the RTP and UDPIP, hardware stacks available from CAST. Flexible interfaces allow easy integration of video, memory, and network controllers, and AXI4-Lite slave interfaces allow a host processor to access all control and status registers. An optional custom logic module allows standalone, processor-free operation and provides access to control and status registers via UDP packets. Video and stream data are transferred among the subsystem’s modules using AXI-Stream, making removing or adding modules straightforward.
  
The subsystem can decode Constraint Baseline Profile streams, encapsulated in RTP or plain UDP and features, sub-frame latency (no frame buffers are implemented). 

• Ultra-Low Latency H.264 Video Decompression
  • Constraint Baseline Profile
  • RTP and UDPIP Decapsulation
  • Sub-frame latency capable
• Host interface via AXi4-Lite or processor-free UDP-controlled operation
• AXI4-ST bus for Video & Stream data
• Supports HD – 720p30/60 and Full-HD – 1080p30
• Customization Options
  • Integration with Video-Outn Controllers (e.g., DVI, HDMI, MIPI-CSI, or SDI)
  • Integration with IP-based MAC controllers (e.g., Ethernet or 802.11 WiFi)
• Reference FPGA Designs
  • Drive display via HDMI, on Xilinx or Intel boards
  • Can work with CAST’s H.264 Encoder Subsystem Reference Designs