Arasan Chip Systems Inc. IP Cores

VESA introduced the first Display Stream Compression (DSC) standard in 2014.

• VESA DSC

The MIPI Alliance was created to define and promote open standards for interfaces to mobile application processors.

• UniPro

MIPI M-PHY Specification Version 4.1 is a low pin count, power efficient, inter-chip serial interface with high bandwidth capabil…

• Multi-Protocol PHY

The LIN Controllers IP– Local Interconnect Network Controllers IPs are compliant to LIN 2.0, 2.1 & 2.2A Specifications.

• LIN

Arasan Chip Systems is a SOC IP provider of a suite of MIPI compliant IP solutions, which consist of IP cores, verification IP, s…

• MIPI

Arasan Chip Systems is a System on Chip (SoC) Intellectual Property (IP) provider of a suite of Mobile Industry Processor Interfa…

• MIPI

Universal Flash Storage (UFS) is a JEDEC standard for high performance mobile storage devices suitable for next generation data s…

• UFS Controller

This IP integrates both xSPI (Expanded Serial Peripheral Interface) and eMMC 5.1 PHY (Physical Layer) into a single unified solut…

• SPI / QSPI XSPI

Embedded USB2 (eUSB2) is a new generation specification proposed by USB Association that extends USB 2.0 specification and uses 1…

• USB

Arasan provides the xHCI (eXtensible Host Controller Interface) driver for the USB 3.0 Host stack that makes it possible to commu…

• USB

The Arasan USB 2.0 OTG DRD IP Core is compliant with the OTG Supplement Rev.

• USB

This is a production-ready software stack for Arasan’s SD 3.0/ SDIO 3.0/ eMMC 4.51 Host Controller IP that is used to connect to …

• SD / eMMC Controller

eMMC 4.51 is the latest specification released by JEDEC and is designed to meet the requirements for secure yet flexible program …

• SD / eMMC Controller

The rapid proliferation of high-performance mobile and handheld devices has resulted in increasing requirements for non-volatile …

• SD / eMMC Controller

MIPI SoundWire®Slave Controller, typically integrated into audio DSP/Codecs or directly into audio peripherals such as Microphone…

• Soundwire

The Master Controller integrated into application processor or audio DSP used in smart phones, tablets and mobile PCs.

• Soundwire

The MIPI I3C host interface is an evolutionary standard that improves upon the features of I2C, while maintaining backward compat…

• I2C / I3C

The I3C Device Controller IP Implements Device Controller functionality as defined by the MIPI Alliance’s I3C Specification.

• I2C / I3C

Arasan Chip Systems is a System on Chip (SoC) Intellectual Property (IP) provider of a suite of Mobile Industry Processor Interfa…

• MIPI

CAN FD Bus Controller IP is an extension of Classical CAN Bus IP that addresses the increasing need for higher data rates and lar…

• CAN / CAN-FD / CAN-XL