The SD 4.1 Device Controller IP core is used to implement SD cards that are connected to a Host processor over a standard SD bus.
- SD / eMMC Controller
Arasan Chip Systems, is a leading provider of IP for mobile storage and mobile connectivity interfaces with over a billion chips shipped with our IP. Arasan’s high-quality, silicon-proven, Total IP Solutions include digital IP, Analog Mixed Signal PHY IP, Verification IP, HDK, and Software. Arasan has a focused product portfolio targeting mobile SoCs. The term Mobile has evolved over our two-decade history to include all things mobile – starting with PDA’s in the mid 90’s to smartphones to today’s Automobiles, Drones, and IoT. Arasan is at the forefront of this evolution of “Mobile” with its standards-based IP at the heart of Mobile SoCs.
The SD 4.1 Device Controller IP core is used to implement SD cards that are connected to a Host processor over a standard SD bus.
The PCI Express End Point is a high-speed, high-performance, and low-power IP core that is fully compliant to the PCI Express Spe…
ONFI Nand Flash Software Driver
The ONFI NFC Driver is a low-level driver developed for Arasan’s ONFI Nand Flash Controller IP that is used to communicate with t…
ONFI 3.2 NAND Flash PHY IP Compliant to JEDEC
The Open NAND Flash Interface (ONFI) is an Open standard for NAND Flash Memory chips.
ONFI 3.2 NAND Flash Controller IP Compliant to JEDEC
The ONFI 3.2 compliant NAND Flash Controller IP Core is a full featured, easy to use, a synthesizable design that is easily integ…
ONFI 2 NAND Flash Controller IP Compliant to JEDEC
The ONFI 2.3 NAND Flash Controller IP Core is a full-featured, easy to use, synthesizable core, easily integrated into any SoC or…
To address the explosive growth in the mobile industry, the Mobile Industry Processor Interface (MIPI) Alliance was created to de…
The Serial Low-Power Inter-chip Media bus protocol (SLIMbus®) software stack provides developers a method for easy development, i…
MIPI SLIMbus Hardware Validation Platform
The SLIMbus® (Serial Low-power Inter-chip Media bus protocol) Hardware Validation Platform provides the mobile industry a versati…
The MIPI SLIMbus Host v2.0 typically resides in a mobile platform’s application processor and provides two-wire, multipurpose con…
The SLIMbus v2.0 Device Controller IP is designed to provide MIPI SLIMbus compliant connectivity for a peripheral device, like an…
Mobile radio communication is trending towards complex multi-radio systems comprising several transceivers.
Mobile radio communication systems are complex multi-radio systems comprising several transceivers.
MIPI M-PHY® 3.1 Analog Transceiver
MIPI M-PHY Specification Version 3.1 is a low pin count, power efficient, inter-chip serial interface with high bandwidth capabil…
The MIPI® D-PHY is compliant to the MIPI D-PHY Specification v2.1.
MIPI D-PHY Analog Transceiver IP Core
To address the explosive growth in the mobile industry, the Mobile Industry Processor Interface (MIPI®) Alliance was created to d…
Combination MIPI CPHY-DPHY Analog Interface
The MIPI C-PHY V1.2 improves throughput over a bandwidth-limited channel, allowing more data without an increased signaling clock.
MIPI CPHY v1.1 Analog Interface
The MIPI CPHY V1.1 improves throughput over a bandwidth-limited channel, allowing more data without an increased signaling clock.
The LLI Controller connects two chips together to create a single “virtual chip”, with both chips sharing the same memory.
To address the explosive growth in the mobile industry, the Mobile Industry Processor Interface (MIPI) Alliance was created to de…