Overview
The rapid proliferation of high-performance mobile and handheld devices has resulted in increasing requirements for non-volatile memory. Memory interfaces with larger capacities and faster access times are needed.
The SD memory card interface dominates the mobile storage markets such as tablets, smartphones, video camcorders, and many other portable or stationary consumer electronics. Designed to be cost-effective and Linux based, this SD 4.1 hardware validation platform (HVP) consists of Arasan’s SD4.0 IP mapped into FPGA’s, offering full speed physical connectivity to a complementary SoC host or memory card device. Owing to its active participation in the SDA standards body, and being the first to market SD controller IP, Arasan’s SD controller IP implementation is considered a reference implementation in the industry.
An equally important part of the SD 4.1 HVP is the software stack, which abstracts all the low-level software drivers and hardware to a loadable shared object with easy to use API’s. Hence, an applications software, validation or systems engineer does not need to delve into the protocol and signaling details and considers the Arasan platform as a programmable complementary device. The SD 4.1 HVP can be used by system developers, system integrators, software developers and system quality analysts to debug as well as validate their products during the product life-cycle.
Learn more about SD / eMMC Controller IP core
UniversalFlash Storage (UFS) was created for mobile applications and computer systems requiring high performance and low power consumption. These systems typically use embedded Flash based on the JEDEC standard eMMC. UFS was defined by JEDEC as the evolutionary replacement for eMMC offering significantly higher memory bandwidth. The standard builds on existing standards such as the SCSI command set, the MIPI Alliance M-PHY and UniPro as well as eMMC form factors to simplify adoption and development.
Universal Flash Storage (UFS) was created for mobile applications and computer systems requiring high performance and low power consumption. These systems typically use embedded Flash based on the JEDEC standard eMMC. UFS was defined by JEDEC as the evolutionary replacement for eMMC offering significantly higher memory bandwidth. The standard builds on existing standards such as the SCSI command set, the MIPI Alliance M-PHY and UniProSM as well as eMMC form factors to simplify adoption and development.
We are living in an age where we generate the same amount of data each year that has been generated since antiquity. Ever wondered how and where these peta /exa/zetta bytes of data are stored?
In this paper we will see how the flash memories developed using Carbon Model Studio helps to bring up an ARM® Cortex A7 flash memory sub-system with primary and secondary boot codes. Flash memories system demonstrated here can be used for early boot code and driver development for any CPU based SoC.
In this article, a new way to implement high performance data storage is presented, allowing the use of server-class storage technology in an embedded environment.
