Embedded USB2 (eUSB) Controller + PHY IP

Embedded USB2 (eUSB2) is a new generation specification proposed by USB Association that extends USB 2.0 specification and uses 1.2V/1.0V as the interface operating voltage. For SoCs operating at 1.2V supply that are suitable for mobile phones, tablets, and laptops, using USB2 interfaces is a challenge as it becomes difficult to support 3.3V IO cells. eUSB2 eliminates the need for 3.3V IO signaling in small process technologies.

eUSB2 can support USB high-speed, full-speed, and low-speed operation, as well as the USB 2.0 L1/L2 link power management requirements. In addition, eUSB2 requires no change to the existing USB 2.0 software programming model. eUSB2 also uses the same two data line configurations, eD+ and eD- as USB2 D+ and D-. Vbus and power delivery are not impacted by eUSB2.

• Compliant to Embedded USB2 Version2.0, Aug 2024
• Supports high-speed, full-speed, and low-speed operation.
• Meet low voltage requirement (1.0V – 1.2V)
• No change in existing USB2/USB3 Port
• Supports symmetric and asymmetric data rates
• Data rate: N x 480Mbps where N = 2 to 10
• Supports 480Mbps symmetric transfers
• Supports configurable low power SLVS transmitter
• Supports configurable de-emphasis
• Supports configurable VGA and CTLE to reduce the power
• Support repeater and native modes

• Analog
  • GDS-II Database
  • LVS Netlist
  • Physical Abstract Models (LEF)
  • Timing Models (LIB)
  • Process Specific Integration Guide
• Digital
  • Synthesizable Verilog RTL
  • Easy-to-use test environment
  • Synthesis scripts
  • Gate count estimates available upon request
• User Guide
• Customer support