The Cryptography Software Library IP offers a comprehensive suite of encryption and certificate processing functions for embedded…
- Symmetric Crypto
Security IP cores provide the hardware foundation required to protect modern SoC and ASIC designs against an increasingly sophisticated threat landscape. They enable secure data processing, trusted device operation, intellectual property protection, and compliance with industry security standards.
This category includes a comprehensive range of security technologies, from cryptography engines for encryption, decryption, hashing, and authentication, to interface security solutions that protect data in transit. It also covers key management IP for secure key generation and storage, root of trust implementations that establish a trusted security foundation, secure processing architectures for isolated execution of sensitive workloads, and side-channel protection technologies designed to mitigate power, timing, electromagnetic, and fault-injection attacks.
This catalog allows you to explore and compare Security IP cores from leading vendors based on security capabilities, performance, certification readiness, attack resistance, silicon maturity, and process node compatibility.
Whether you are developing connected IoT devices, automotive platforms, industrial equipment, consumer electronics, networking infrastructure, or cloud and edge computing systems, you can identify the security IP solutions needed to build resilient and trustworthy semiconductor products.
The Cryptography Software Library IP offers a comprehensive suite of encryption and certificate processing functions for embedded…
Ultra High Performance AES-GCM/CTR Core
The proliferation and expansion of connected devices, connectivity infrastructure, cloud computing, and artificial intelligence, …
The compact, High-Performance AES-GCM/CTR IP implements the AES-GCM/CTR algorithm as specified in the National Institute of Stand…
Multipurpose Security Protocol Accelerator
The Multipurpose Security Protocol Accelerator (SPAcc) offers designers unprecedented configurability to address the complex secu…
Security Protocol Accelerator for SM3 and SM4 Ciphers
Complex system-on-chip (SoC) requirements can include security at various application layers.
AES encryption transforms plaintext into ciphertext through multiple transformation rounds.
Multipurpose Security Protocol Accelerator - Functional Safety ASIL B support
The Multipurpose Security Protocol Accelerator (SPAcc) offers designers unprecedented configurability to address the complex secu…
Ultra High Performance AES-XTS/ECB Core
The proliferation and expansion of connected devices, connectivity infrastructure, cloud computing, and artificial intelligence, …
ES256-XTS IP Core (AES256XTSIP) implement the encryption standard (AES) with XEX Tweakable Block Cipher with Ciphertext Stealing …
Quantum Safe IPsec Toolkit (QuickSec Quantum) is first to market, IPsec software implementation with Quantum Safe cryptography su…
The Xilinx® LogiCORE™ AXI Firewall IP is designed to protect AXI DMA from hangs and protocol violations downstream of it that may…
The Bitec HDCP IP Core is for use with the Bitec DP and HDMI IP cores.
Geon Secure Execution Processor delivers secure code execution by supporting two secure contexts.
The SHA-3 module implements the SHA3-512, SHA3-384, SHA3-256 and SHA3-224 hash algorithms and the SHAKE128 and SHAKE256 extendabl…
SHA-512, SHA-384, SHA512/256 and SHA-512/224
The SHA-512 module implements the SHA-512, SHA-384, SHA-512/256 and SHA-512/224 hash algorithms specified in FIPS PUB 180-4, the …
The SHA-256 module implements both the SHA-256 and SHA-224 hash algorithms specified in FIPS PUB 180-4, the Secure Hash Standard.
IEEE 802.1ae MACSEC IP Core for 10 Gbit Ethernet
Ethernet is a ubiquitous, efficient and cost-effective transport mechanism for unified communication of voice, data and video ove…
Multiple SecY IEEE 802.1ae MACSEC IP Core for 40Gbit Ethernet
Ethernet is a ubiquitous, efficient and cost-effective transport mechanism for unified communication of voice, data and video ove…
AES-GCM IP Core for 40Gbit/sec packet data
This state of the art implementation of AES-GCM achieves 40Gbit/sec performance on Virtex 5 FPGAs.
Duplex AES-GCM at 10Gbit/sec for OTN
This state of the art implementation of the AES-GCM algorithm provides privacy and authentication and achieves 10Gbit/sec perform…