Xilinx, Inc.
•
HQ:
USA
The LPDDR3 Controller gives you the ability to design with less power and a smaller form factor while maintaining high performanc…
- Controller
Compare 890 Memory Interface IP Cores from 61 vendors
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Xilinx, Inc.• HQ: USA
Massive memory bandwidth, the simplicity of an AXI Interface, no need for external pins HBM IP, made available for Virtex UltraSc…
- Controller
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Lattice Semiconductor Corp.• HQ: USA
The Reduced Latency Dynamic Random Access Memory (RLDRAM) Controller is a general-purpose memory controller that interfaces with …
- Controller
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Lattice Semiconductor Corp.• HQ: USA
A Lattice FPGA based LPDDR3 solution – The Lattice Low Power Double Data Rate (LPDDR3) Synchronous Dynamic Random Access Memory (…
- Controller
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Lattice Semiconductor Corp.• HQ: USA
The LPDDR Synchronous Dynamic Random Access Memory (SDRAM) Controller is a general-purpose memory controller that interfaces with…
- Controller
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Lattice Semiconductor Corp.• HQ: USA
Fast Cycle RAM (FCRAM) is a DRAM technology with a specialized memory core technology that achieves faster random access times an…
- Controller
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Lattice Semiconductor Corp.• HQ: USA
The Lattice Double Data Rate (DDR3) Synchronous Dynamic Random Access Memory (SDRAM) Controller is a general-purpose memory contr…
- Controller
- DDR3
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Lattice Semiconductor Corp.• HQ: USA
The Lattice Double Data Rate (DDR3) Physical Interface (PHY) IP is a general-purpose IP that provides connectivity between a DDR3…
- Controller + PHY + 1
- DDR3
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DDR/DDR2 SDRAM Controller MACO Core
Lattice Semiconductor Corp.• HQ: USAThe DDR/DDR2 Synchronous Dynamic Random Access Memory (SDRAM) Controller MACO Core is a general-purpose memory controller that in…
- Controller
- DDR2
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DDR SDRAM Controller - Pipelined for ispXPGA and ORCA4
Lattice Semiconductor Corp.• HQ: USADDR (Double Data Rate) SDRAM was introduced as a replacement for SDRAM memory running at bus speeds over 75MHz.
- Controller
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DDR SDRAM Controller - Non-Pipelined
Lattice Semiconductor Corp.• HQ: USAThis version of the Lattice DDR SDRAM Controller does not have pipelining, and is significantly smaller than the pipelined versio…
- Controller
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Xilinx, Inc.• HQ: USA
The Xilinx® LogiCORE™ IP HMC Controller implements a high performance, configurable HMC host controller for user to interconnect …
- Controller
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Xilinx, Inc.• HQ: USA
The RLD3 Controller gives you the ability to design for Reduced Latency DRAM while maintaining high performance and density.
- Controller
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Xilinx, Inc.• HQ: USA
The Xilinx DDR4 controller is high performance (2667Mbps in UItraScale+) and supports a wide range of configurations from low cos…
- Controller
- DDR4
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Xilinx, Inc.• HQ: USA
The Xilinx DDR3 controller is high performance (2133Mbps in UItraScale) with support for lower power DDR3L as well as UDIMMs, SOD…
- Controller
- DDR3
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compensation block for FXDDR3LTA102HH0L and FXDDR3LTD102HH0L,UMC 40nm LP/RVT LowK Logic Process .
Faraday Technology• HQ: Taiwancompensation block for FXDDR3LTA102HH0L and FXDDR3LTD102HH0L,UMC 40nm LP/RVT LowK Logic Process .
- Controller
- DDR3
- UMC
- 40nm
- LP
- Pre-Silicon
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Faraday Technology• HQ: Taiwan
Data Block of DDR3/DDR3L/DDR2/LPDDR2/LPDDR Combo PHY for Chip Application (compliant with DFI spec); UMC 40nm LP LowK Logic Proce…
- Controller + PHY + 1
- UMC
- 40nm
- LP
- Pre-Silicon
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Faraday Technology• HQ: Taiwan
Data Block of DDR3/DDR3L/DDR2/LPDDR2/LPDDR Combo PHY for Chip Application; UMC 55nm SP/RVT LowK Logic Process
- Controller + PHY + 1
- UMC
- 55nm
- SP
- Pre-Silicon
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Faraday Technology• HQ: Taiwan
Data Block of DDR3/DDR3L/DDR2/LPDDR2/LPDDR Combo PHY for Chip Application; UMC 55nm SP/RVT LowK Logic Process
- Controller + PHY + 1
- UMC
- 55nm
- SP
- Pre-Silicon
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Data Block of DDR3 Combo PHY for DIMM version ; UMC 55nm LP/RVT LowK Logic Process
Faraday Technology• HQ: TaiwanData Block of DDR3 Combo PHY for DIMM version ; UMC 55nm LP/RVT LowK Logic Process
- Controller + PHY + 1
- DDR3
- UMC
- 55nm
- LP
- Pre-Silicon