224G SerDes PHY and controller for UALink for AI systems
- UALink
Interface and connectivity IP cores enable communication between components, chips, and systems in modern SoC and ASIC designs.
These IP cores implement a wide range of communication standards including high-speed serial interfaces, on-chip interconnects, chiplet and die-to-die links, and low-speed control interfaces.
This catalog allows you to explore and compare connectivity IP cores from leading vendors based on bandwidth, latency, protocol support, and process node compatibility.
Whether you are designing high-performance computing systems, data center processors, automotive platforms, or embedded systems, you can find the right interface IP for your communication requirements.
224G SerDes PHY and controller for UALink for AI systems
SLM High-Speed Access & Test IP
Leverage existing functional interfaces to access DFT or SLM network over entire silicon lifecycle The SLM High-Speed Access and …
High-speed serial interface compliant with V-by-One® HS plus standard IP core for FPGAs that supports “V-by-One® HS plus Standard…
V-by-One® HS Tx IP / V-by-One® HS Rx IP
High-speed serial interface compliant with V-by-One® HS standard V-by-One® HS IP is an IP to achieve V-by-One HS high-speed video…
MECHATROLINK-III Master/Slave IP
MECHATROLINK-III Master/Slave IP together with CPU communicates with the products adapting.
Timing and Synchronization protocol implementation for application in Automotive Ethernet (AVB/TSN), Industrial automation and co…
Silicon Agnostic, Silicon proven and Comprehensive hardware and software solution The 10M End Station Controller IP is a comprehe…
Quad Serial Gigabit Media Independent Interface (QSGMII)
QSGMII (Quad Serial Gigabit Media Independent Interface) IP from Comcores is a high-speed serial interface developed to aggregate…
Universal Serial 10GE Media Independent Interface (USXGMII)
The USXGMII PCS IP provides the logic required to integrate a USXGMII-M IP into any system on chip (SoC).
Serial Gigabit Media Independent Interface (SGMII)
SGMII (Serial Gigabit Media Independent Interface) IP is a high-speed serial interface developed to connect a Gigabit Ethernet MA…
Ethernet PCS 1G/2.5G/5G/10G/25G & CPRI 7.0
A combined silicon agnostic implementation of the PCS layer compliant with Ethernet standard IEEE 802.3-2018 and CPRI Specificati…
High performance Ethernet PCS IP core for data centers, hyperscaler and AI applications The 800G Ethernet PCS IP core is a silico…
Silicon agnostic Ethernet TSN MAC IP with speeds of 40G and 100G, based IEEE 802.3 Ethernet Layer 2 solution with support for key…
High-performance, standard-compliant, silicon-agnostic solution designed to meet the demanding requirements of data center, hyper…
Size optimized, Silicon agnostic, Silicon Proven Ethernet MAC IP core for High Speed Ethernet applications The 200G/400G Ethernet…
Deep Buffering Memory 1G Ethernet Switch
switch supporting buffering of large amounts of data in external DDR RAM The 1G deep buffering memory Ethernet Switch is an Ether…
10M/100M/1G/10G/25G Advanced Ethernet TSN Switch IP
versatile, high performance Ethernet Switch with an extensive set of QoS features and statistics.
The proliferation of sensors in mobile wireless and mobile-influenced products has created significant design challenges.
Avery SAS VIPs support verification of host and device and expansion targets.
Verification IP for DisplayPort/eDP/DSC/DPI
A comprehensive VIP solution for DisplayPort (DP) and eDP source and sink designs.