The I2C is a two-wire, bi-directional serial bus, that provides a simple and efficient method of short distance data transmission…
- I2C / I3C
- Now
Interface and connectivity IP cores enable communication between components, chips, and systems in modern SoC and ASIC designs.
These IP cores implement a wide range of communication standards including high-speed serial interfaces, on-chip interconnects, chiplet and die-to-die links, and low-speed control interfaces.
This catalog allows you to explore and compare connectivity IP cores from leading vendors based on bandwidth, latency, protocol support, and process node compatibility.
Whether you are designing high-performance computing systems, data center processors, automotive platforms, or embedded systems, you can find the right interface IP for your communication requirements.
The I2C is a two-wire, bi-directional serial bus, that provides a simple and efficient method of short distance data transmission…
Fully compliant with standard AMBA® CXS Version A, B, C and D specifications from ARM.
USB OTG 2.0 with xHCI Verification IP
Fully compliant with OTG Supplement to USB2.0 specification
Fully compatible with FlexRay specification Version 3.0.1
Truechip's UCIe Verification IP offers a streamlined and efficient solution for verifying UCIe components within an IP or SoC.
Supports Standard 1.6T MII Interface
Truechip's SGPIO Verification IP provides an effective & efficient way to verify the components interfacing with an IP or SoC.
Truechip's SDI Verification IP offers a streamlined and efficient solution for verifying SDI (Serial Digital Interface) components within an IP or SoC.
UALink 200G v1.0 Verification IP
Fully compliant with the UALink V1.0 specification from the UALink consortium
Complete TCP/IP Hardware Protocol Stack capable of transmitting and receiving data at speeds up to 100 Gbps.
Universal Chiplet Interconnect Express for multi-die system integration
64 GT/s next-generation interface for cutting-edge AI and datacenter platforms
Fully compliant to SWI3S Specification version 1.0
Highly flexible, low-latency, multiport TSN Ethernet switch
Multi-Protocol AMBA Support - Advanced Routing & Arbitration - Virtual Channel Deadlock Avoidance - Unlimited Scaling
Fully compliant with V-by-One HS / HS Plus THine Specification.
The AXI-BRG enables communication between an AXI5 interface and an AXI4 interface.
AXI5-Stream to/from AXI4-Stream Bridges
The AXIS-BRG enables communication between an AXI5-Stream interface and an AXI4-Stream interface.
The APB-BRG enables communication between an APB5 Requester and an APB4 Completer.
The UALink IP supports 800Gbps and 400Gbps bandwidth modes with backward compatibility for 200Gbps and 100Gbps.