What is PDM Modulator PCM to PDM Conversion IP?
PDM Modulator PCM to PDM Conversion IP is a PDM IP core from Acute Design listed on Semi IP Hub.
Vendor:
Acute Design
Category:
PDM
PDM Modulator PCM to PDM Conversion IP
PCM-to-PDM audio IP combining interpolation and fifth-order CRFB noise shaping with synchronized output control.
Overview
The PDM Modulator converts PCM audio into a one-bit PDM stream for compatible PDM amplifiers, DACs or other output peripherals. It combines interpolation with a configurable fifth-order CRFB sigma-delta loop and quantization. Ready/valid streaming and APB-based synchronized control support integration into low-latency audio paths.
PDM Modulator Specifications
|
Attribute |
Specification |
|
Conversion |
PCM input to one-bit PDM output |
|
PCM input rate |
96 to 768 kHz |
|
PDM output rate |
Up to 6.144 MHz |
|
Interpolation and shaping |
Ratio up to 128; fifth-order CRFB sigma-delta loop |
|
Reference latency |
Approximately 2.6 µs at about 3 MHz PDM output |
|
Reference power |
170 µW at 3 MHz PDM in a 22 nm ULL reference implementation |
|
Noise performance |
Theoretical SNR up to 120 dB in the 0 to 20 kHz passband under suitable oversampling and coefficient settings |
|
Interfaces and channels |
Ready/valid PCM/PDM streams; APB control; up to 8 synchronized channels |
Reference latency and power are configuration-specific. Input rate, PDM rate and interpolation ratio must be mutually consistent. The SNR figure is theoretical and is not a measured converter or complete output-chain specification.
Availability and validation
|
Status |
Description |
|
Availability |
Ready to be integrated. |
|
Completed validation |
RTL verification completed. |
|
Reference process |
22 nm ULL reference implementation for the stated power figure. |
|
Planned milestones |
Contact ACUTE Design for the current roadmap; no public dates are stated here. |
Key features
- PCM input rates from 96 to 768 kHz; PDM output up to 6.144 MHz.
- Interpolation ratio up to 128 with programmable CRFB coefficients and fixed-point scaling.
- Approximately 2.6 µs reference group delay at about 3 MHz PDM output.
- Up to eight synchronized output channels under shared APB control.
- Optional FP32-to-fixed conversion, PCM interface adaptation and a physical PDM interface.
Block Diagram
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Benefits
Interpolation and noise shaping connect a digital PCM processing path to a compatible PDM output stage. Synchronized channel start, stop and reconfiguration support correlated outputs. Programmable coefficients let the noise-shaping configuration match the rate and output-stage requirements.
Applications
Low-latency ANC and transparency output paths, earbuds and headsets, PDM amplifier interfaces, and PCM-to-PDM conversion within audio SoCs.
Specifications
Identity
Part Number
PDM Modulator
Vendor
Acute Design
Type
Silicon IP
Files
Note: some files may require an NDA depending on provider policy.
Provider
HQ:
France
Frequently asked questions about PDM IP cores
How should engineers evaluate this PDM?
Engineers should review the overview, key features, supported foundries and nodes, maturity, deliverables, and provider information before shortlisting this PDM IP.
Can this semiconductor IP be compared with similar products?
Yes. Buyers can compare this product with similar semiconductor IP cores or IP families based on category, provider, process options, and structured technical specifications.