Interface and connectivity IP cores enable communication between components, chips, and systems in modern SoC and ASIC designs.
These IP cores implement a wide range of communication standards including high-speed serial interfaces, on-chip interconnects, chiplet and die-to-die links, and low-speed control interfaces.
This catalog allows you to explore and compare connectivity IP cores from leading vendors based on bandwidth, latency, protocol support, and process node compatibility.
Whether you are designing high-performance computing systems, data center processors, automotive platforms, or embedded systems, you can find the right interface IP for your communication requirements.
Intel® Arria® 10 and Intel® Cyclone® 10 PCIe Hard IP
Intel® Arria® 10 and Intel® Cyclone® 10 GX FPGAs include a configurable, hardened protocol stack for PCI Express* that is complia…
Multichannel DMA Intel FPGA IP for PCI Express*
The Multichannel DMA IP for PCI Express provides high efficiency, speed, and configuration flexibility to support various applica…
Low Latency Ethernet 10G MAC FPGA IP
The Low Latency Ethernet 10G MAC FPGA IP core (soft IP) offers low round-trip latency, and an efficient resource footprint.
Low Latency Ethernet 100G MAC and PHY Intel® FPGA IP Core
Intel® offers ultimate flexibility, scalability, and configurability with the Low Latency 100G Ethernet Intel® FPGA IP core targe…
The JEDEC committee created the JESD204 data converter serial interface standard to standardize and reduce the number of data inp…
The Interlaken Intel® FPGA IP core is Interlaken Protocol Definition v1.2 compliant and allows system developers to achieve high …
Interlaken Look-Aside Intel® FPGA IP
Interlaken Look-Aside is a scalable protocol that allows interoperability between a datapath device and a look-aside coprocessor …
The enhanced Common Public Radio Interface (eCPRI) Altera® FPGA IP core implements the eCPRI specification version 2.0.
Compute Express Link (CXL) FPGA IP
Industry's first FPGA-based hardened CXL IP solution for Type 1, 2, and 3 devices.
The Common Public Radio Interface (CPRI) Altera® FPGA IP core implements the CPRI Specification V7.0.
Backplane Ethernet 10GBASE-KR PHY Intel® FPGA IP Core
The Backplane Ethernet 10GBASE-KR PHY Intel® FPGA Intellectual Property (IP) core is a transceiver PHY that allows you to instant…
Intel® Agilex™ 7 F-Tile Ethernet Hard IP
The Intel® Agilex™ 7 FPGA F-Tile incorporates a fracturable, configurable, hardened Ethernet protocol stack for supporting rates …
Intel® Agilex™ 7 and Intel® Stratix® 10 FPGA E-Tile Hard IP
The Intel® Agilex™ 7 and Intel® Stratix® 10 FPGA E-Tile incorporates a configurable, hardened Ethernet protocol stack compatible …
The 50G Ethernet Intel® FPGA IP core implements the 25G & 50G Ethernet Specification, Draft 1.4 from the 25 Gigabit Ethernet Cons…
40G Ethernet MAC and PHY FPGA IP Core
The 40G Ethernet MAC and PHY FPGA IP core offers IEEE 802.3ba-2010.
This IP core implements the 25G and 50G Ethernet Specification, Draft 1.4 from the 25 Gigabit Ethernet Consortium.
1G/10Gb Ethernet PHY Intel® FPGA IP
The 1G/10G Ethernet PHY Intel® FPGA Intellectual Property (IP) core supports functionality of both the standard physical coding s…
Multi-Rate Ethernet PHY FPGA IP
The Multi-Rate Ethernet PHY FPGA IP core can dynamically support multiple data rates without any design regeneration or device re…
The XAUI PHY Intel® FPGA IP core allows you to easily build systems with a very high throughput 10G Ethernet connection.
Siemens EDA* AXI Verification IP Suite
The Siemens EDA AXI Verification IP Suite (Intel® FPGA Edition) provides bus functional models (BFMs) to simulate the behavior an…