The VA08V is a low complexity 16, 32, 64 or 256 state error control decoder using the maximum likelihood Viterbi algorithm.
- Channel Coding
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Compute and acceleration IP cores are specialized hardware blocks designed to improve performance and efficiency in modern SoC and ASIC designs.
This category covers a diverse ecosystem of processing technologies, including CPU and microcontroller cores for embedded control and software execution, AI/ML accelerators for neural network processing, DSP and math engines for real-time signal processing, data compression accelerators for efficient storage and communications, and eFPGA fabrics that provide post-silicon flexibility and hardware reconfigurability.
Whether you are designing for edge AI, automotive systems, consumer electronics, or data center acceleration, you can identify the right IP to optimize your system performance.
The VA08V is a low complexity 16, 32, 64 or 256 state error control decoder using the maximum likelihood Viterbi algorithm.
softDSP released 3GPP compliant Turbo decoder IP core in May, 2000.
3GPP UMTS LTE 3GPP2 cdma2000 1xEV-DV 1xEV-DO Turbo Decoder with Optional Viterbi Decoder
This is a fully compatible 3GPP (UMTS and LTE) and 3GPP2 cdma2000 (1xEV-DV Release D and 1xEV-DO Release B) error control decoder.
3GPP UMTS LTE 3GPP2 cdma2000 1xEV-DV 1xEV-DO 8 state turbo encoder
This is a high speed 8 state 3GPP™ (UMTS and LTE) and 3GPP2 cdma2000 (1xEV-DV Release D and 1xEV-DO Release B) compatible paralle…
Very High Speed 8 State MAP Decoder
This is a very high speed 8 state maximum a posteriori (MAP) soft-in-soft-out (SISO) triple interleaved error control decoder wit…
Cloud and Data Center Compute Subsystem
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Configurable transformer accelerator
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64-bit, RISC-V, ultra-high performance processors
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64-bit, RISC-V, performance and data computation processors
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32-bit, RISC-V, deeply embedded processors
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32-bit RISC multiprocessor platform for the most demanding computational tasks
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Configurable CPU tailored precisely to your needs
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Parameterizable compact BCH codec
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Revolutionary dataflow architecture optimized for AI workloads with spatial compute arrays, intelligent memory hierarchies, and r…
20-bit -120dB THD+N Multi-Channel Audio Sample Rate Converter
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The Fast Fourier Transforms (FFT) are an efficient class of algorithms for digital computation of the Discrete Fourier Transform …