Discover CPU and Microcontroller IP for embedded processing, real-time control, and general-purpose computation in semiconductor designs. This category includes processor IP used in SoCs, ASICs, and embedded platforms requiring software programmability, deterministic control, and scalable compute performance.
Compare CPU and Microcontroller IP by ISA, bit width, safety support, performance level, memory architecture, debug features, ecosystem maturity, and target applications. These IP cores are widely used in automotive, industrial, IoT, consumer, and communication chips.
Ultra-low power processor with RISC-V architecture possessing secure execution capability
E902 utilizes a 2-stage minimalistic pipeline compatible with RISC-V architecture, and is enhanced in execution efficiency.
SCR5 is an efficient, silicon-proven, entry-level Linux-capable 32/64-bit RISC-V processor core.
SCR4 is a 32/64-bit RISC-V low-power, high-performance, area-optimized processor core with floating-point arithmetic functionalit…
SCR3 is an efficient, silicon-proven, microcontroller-class, 32/64-bit RISC-V processor core.
SCR1 is an open-source and silicon-proven RISC-V-compatible, 32-bit, entry-level, MCU-class core.
64-bit RISC-V core with out-of-order pipeline based complex for Linux-based embedded systems
64-bit RISC-V core with out-of-order pipeline based complex.
64-bit RISC-V core with in-order dual issue pipeline based complex for Linux-based systems
64-bit RISC-V core with in-order dual issue pipeline based complex.
32-bit RISC-V core with in-order single issue pipeline for Linux-based systems
32-bit RISC-V core with in-order pipeline.
64-bit Multiprocessor with Level-2 Cache-Coherence
AndesCore™ AX25MP 64-bit multicore CPU IP is based on AndeStar™ V5 architecture.
32-bit Multiprocessor with Level-2 Cache-Coherence
AndesCore™ A25MP 32-bit multicore CPU IP is based on AndeStar™ V5 architecture.
Third-Generation, High-Performance CPU Based on DynamIQ Technology Built for powering next-generation 5G solutions Designed for d…
As more functionality is integrated into an SoC, it is costly and time consuming to develop and maintain necessary functional blo…
Machine vision and deep learning are being embedded in integrated SoCs and expanding into high-volume applications such as automo…
Synopsys offers a suite of development tools, ARC development systems and operating systems, providing everything a developer nee…
Synopsys has a long history of working with DSP customers to meet the ever-increasing computation requirements, offering lowest p…
The Synopsys ARC® EM Family, based on the ARCv2 instruction set architecture (ISA) includes ARC EM4 and EM6, DSP-enhanced EMxD pr…
The latest additions to the Synopsys ARC® ARC HS family, the 32-bit ARC HS5x and 64-bit HS6x processors, are based on the new ARC…
Ultra Compact 32-bit RISC-V CPU Core
AndesCore™ N22 is a 32-bit 2-stage pipeline CPU IP core based on AndeStar™ V5 architecture for embedded applications that require…
First High Performance Split-Lock DynamIQ CPU
The all new Arm Cortex-A family of Automotive Enhanced (AE) high performance processors is designed for devices undertaking compl…
Compact High-Speed 64-bit CPU Core
AndesCore™ NX25F is a compact 64-bit CPU IP core based on AndeStar™ V5 architecture which incorporated RISC-V technology, it is t…