SCR1 is an open-source and silicon-proven RISC-V-compatible, 32-bit, entry-level, MCU-class core.
SCR1 is an open-source and silicon-proven RISC-V-compatible, 32-bit, entry-level, MCU-class core. It targets general-purpose, deeply embedded applications and control systems.
SCR1 supports RISC-V standard "I" Integer, "E" Reduced Base Integer, "M" Integer Multiplication and Division, and "C" 16-bit Compressed extensions. SCR1 is equipped with an in-order 4-stage pipeline, a TCM unit, an IPIC unit for efficient interrupt processing, as well as industry-standard AXI4, AHB-Lite, and JTAG/cJTAG interfaces for flexibility and compatibility.
The core is open-sourced under the permissive SHL license, comes with pre-configured software tools, and is ready out-of-the-box for commercial and educational purposes.
SCR1 Key Features
| Core | |
|---|---|
| ISA | RV32I/E[MC], Integer Multiplication and Division [M], Compressed Instructions [C] — optional |
| Pipeline | 2-4 stages |
| Memory Subsystem | |
| Tightly-Coupled Memory (TCM) | Up to 64KB |
| Interrupt Subsystem | |
| IPIC | Up to 16 interrupt lines |
| Debug Subsystem | |
| Interface | JTAG/cJTAG-compliant interface |
| Breakpoints | Up to 2 hardware breakpoints, unlimited software breakpoints support |
| Interfaces | |
| AXI | Master AXI4 AMBA standard interface |
| AHB | Master AHB-Lite AMBA standard interface |
| Timers and Counters | |
| Performance Monitoring | 2 performance counters |
| Embedded 64-bit RTC Timer | Machine-mode timer interrupt support |
Development Tools
Syntacore Development Toolkit (SCR1 Optimized)
The SC-DT package is a ready-to-use software development kit containing pre-built and pre-configured tools that simplify software development for the SCR1 core. With SC-DT, you can take advantage of the pre-built tools and configurations to reduce the time and effort required to get up and running with SCR1. SC-DT supports Windows and Linux operating systems and includes:
Syntacore also supports and maintains the Zephyr operating system that is not part of the SC-DT package and is downloadable separately.
SCR1 is available out-of-the-box, configurable, written in SystemVerilog and comes with a full set of pre-built, tested, and optimized development tools, system software, pre-configured FPGA-based SDK and complete documentation. The software package includes ready-to-use toolchains, IDEs, operating systems, bootloaders, debuggers, simulators, and sample projects that reduce the time and effort required to get up and running with SCR1.
The SCR1 product package includes:
Note: some files may require an NDA depending on provider policy.
Open-source compact microcontroller core with a 4-stage in-order pipeline for deeply embedded applications is a MCU IP core from Syntacore listed on Semi IP Hub.
Engineers should review the overview, key features, supported foundries and nodes, maturity, deliverables, and provider information before shortlisting this MCU IP.
Yes. Buyers can compare this product with similar semiconductor IP cores or IP families based on category, provider, process options, and structured technical specifications.