CPU IP cores provide general-purpose processing for application, control, and system software workloads in modern SoC and ASIC designs.
These IP cores deliver programmable compute for embedded and high-performance SoCs, often serving as the central control or application processor in the architecture
This catalog allows you to compare CPU IP cores from leading vendors based on performance, power efficiency, software ecosystem, and process node compatibility.
Whether you are designing application processors, embedded systems, networking equipment, or compute SoCs, you can find the right CPU IP for your application.
Compact High-Speed 32-bit CPU Core with Level-2 Cache
The 32-bit A27L2 is a 5-stage processor that supports the latest RISC-V specification, including “G” (“IMAFD”) standard instructi…
U74-MC Multicore: four U74 cores and one S76 core
The SiFIve U74-MC Standard Core is the world's highest performance RISC-V application processor, capable of supporting full-featu…
U74 High performance Linux-capable RISC V processor
The SiFive U74 Standard Core is a single-core instantiation of the world's highest performance RISC-V application processor, capa…
U54 MC Multicore: four U54 cores and one S51 core
The SiFive U54-MC Standard Core is the world's first RISC-V application processor, capable of supporting full-featured operating …
U54 Linux-capable RISC V application processor
The SiFive U54 Standard Core is a single-core instantiation of the world's first RISC-V application processor, capable of support…
S76 MC Quad-core 64-bit embedded processor
The SiFive S76-MC Standard Core is a high-performance 64-bit quad-core embedded processor which is fully-compliant with the RISC-…
S76 High-performance 64-bit embedded core
The SiFive S76 Standard Core is a high-performance 64-bit embedded processor which is fully-compliant with the RISC-V ISA.
S54 64-bit embedded RISC V processor
The SiFive S54 Standard Core is a 64-bit embedded processor that is fully-compliant with the RISC-V ISA.
S51 Low-power 64-bit MCU RISC V core
The SiFive S51 Standard Core is a 64-bit embedded processor, fully compliant with the RISC-V ISA.
E76-MC Quad-core 32-bit embedded processor
The SiFive E76-MC Standard Core is a high-performance quad-core 32-bit embedded processor which is fully-compliant with the RISC-…
E76 High performance 32-bit embedded processor
The SiFive E76 Standard Core is a high-performance 32-bit embedded processor which is fully-compliant with the RISC-V ISA.
The SiFive E34 Standard Core adds single-precision floating-point to the SiFive E31 Standard Core, the worldÃ?¢Ã?Â?Ã?Â?s most de…
E20 Smallest, most efficient RISC V Ccore
The SiFive E20 Standard Core is an extremely efficient implementation of the E2 Series configured for very low area and power.
High performance Linux-capable processor
The SiFive U84 Standard Core is a single-core instantiation of our most scalable out-of-order RISC-V application processor, and i…
IOb-SoC is a RISC-V SoC template written in Verilog, which users can download for free, modify, simulate and implement in FPGA or…
Compact High-Speed 32-bit CPU Core with MemBoost and PMA
The 32-bit A27 is a 5-stage processor that supports the latest RISC-V specification, including "G" ("IMAFD") standard instruction…
64-bit CPU with Modern RISC Architecture, MemBoost and PMA
The 64-bit AX27 is a 5-stage processor that supports the latest RISC-V specification, including “G“ (“IMAFD”) standard instructio…
Codasip Studio is a set of Electronic Design Automation (EDA) tools for processor design and customization.
64-bit Multiprocessor with Level-2 Cache-Coherence
AndesCore™ AX25MP 64-bit multicore CPU IP is based on AndeStar™ V5 architecture.
32-bit Multiprocessor with Level-2 Cache-Coherence
AndesCore™ A25MP 32-bit multicore CPU IP is based on AndeStar™ V5 architecture.