Overview
The SiFive S76-MC Standard Core is a high-performance 64-bit quad-core embedded processor which is fully-compliant with the RISC-V ISA.
The S76-MC is ideal for latency-sensitive applications in domains such as storage and networking that require high-throughput, 64-bit memory addressability, and have real-time constraints (e.g. Enterprise Storage, In-storage Compute, 5G Base Stations, SLAM processing, etc.)
Learn more about CPU IP core
SiFive is evolving the building blocks of RISC-V-based IP that are reimagining and democratizing every computing platform. We take a closer look at the new Performance P570 Gen 3 and its next-gen applications.
SiFive and NVIDIA announced a major milestone: we are working together to integrate NVIDIA NVLink Fusion into SiFive’s high-performance RISC-V data center solutions.
For years, SiFive has been delivering a range of security capabilities that are optimized for deployment throughout the system, tightly coupled to products from its broad portfolio of processors. Building on the prior blogs that centered on performance and effective coupling of accelerators, I wanted to focus this blog on security and its role in the growing popularity of the SiFive Intelligence X100 product family.
In this blog, I dive a little deeper into the options to efficiently couple a processor from the X100 series to a hardware accelerator.
When I joined SiFive in early 2024, the initial focus (which has since broadened) was to explore how best to drive adoption of SiFive’s RISC-V technology into system-on-chip components targeting data center use cases.
Reflecting on how far we’ve come since SiFive launched the world’s first RISC-V development boards back in 2016, it’s clear we’ve been on an incredible journey together with the RISC-V software community.
