64-bit RISC-V Application Processor Core
The A70 is a 64-bit RISC-V application processor aimed at systems running Linux.
- RISC-V
CPU IP cores provide general-purpose processing for application, control, and system software workloads in modern SoC and ASIC designs.
These IP cores deliver programmable compute for embedded and high-performance SoCs, often serving as the central control or application processor in the architecture
This catalog allows you to compare CPU IP cores from leading vendors based on performance, power efficiency, software ecosystem, and process node compatibility.
Whether you are designing application processors, embedded systems, networking equipment, or compute SoCs, you can find the right CPU IP for your application.
64-bit RISC-V Application Processor Core
The A70 is a 64-bit RISC-V application processor aimed at systems running Linux.
32-bit 8-stage superscalar processor that supports RISC-V specification, including GCNP and Linux
The 32-bit A45 is an 8-stage superscalar processor that supports RISC-V specification, including “G” (“IMAFD”) standard instructi…
64-Bit 8-stage superscalar RISC-V processor
The 64-bit NX45 is an 8-stage superscalar processor that supports RISC-V specification, including “G” (“IMAFD”) standard instruct…
64-bit RISC-V core with out-of-order pipeline based complex for Linux-based embedded systems
64-bit RISC-V core with out-of-order pipeline based complex.
64-bit RISC-V core with in-order dual issue pipeline based complex for Linux-based systems
64-bit RISC-V core with in-order dual issue pipeline based complex.
32-bit RISC-V core with in-order single issue pipeline for Linux-based systems
32-bit RISC-V core with in-order pipeline.
Tessent RISC-V trace and debug
The Tessent Enhanced Trace Encoder is the market- trace solution for RISC-V.
Compact, efficient 64-bit RISC-V processor with 5-stage pipeline
The H50 is an entry level, compact, efficient 64-bit embedded RISC-V processor aimed at embedded systems requiring a large addres…
RISC-V processor - 32 bit, 5-stage pipeline
The L50(F) is a medium-sized, efficient 32-bit embedded RISC-V processor aimed at embedded systems with mid-range processing requ…
Tiny, Ultra-Low-Power Embedded RISC-V Processor
The BA5x-TN is a compact, ultra-low power, 32-bit, deeply embedded processor IP core.
Low-Power Embedded RISC-V Processor
The BA5x-LP is a efficient, low-power, 32-bit, deeply embedded processor IP core.
Enhanced-Processing Embedded RISC-V Processor
The BA5x-EP is a -featured 32-bit RISC-V embedded processor IP core optimized for complex, processing-demanding applications.
Vector-Capable Embedded RISC-V Processor
The EMSA5-GP is a -featured 32-bit RISC-V embedded processor IP core optimized for processing-demanding applications.
Compact Embedded RISC-V Processor
The BA5x-CM is a feature-rich 32-bit deeply embedded processor.
RISC-V AI Acceleration Platform - Scalable, standards-aligned soft chiplet IP
Unlocking AI with Open Compute Traditional AI processors force customers into closed hardware-software ecosystems that limit inno…
64 bit RISC-V Multicore Processor with 2048-bit VLEN and AMM
AndesCore™ AX46MP(V) 64-bit multicore CPU IP is an 8-stage superscalar processor with Vector Processing Unit (VPU) based on AndeS…
32 bit RISC-V Multicore Processor with 256-bit VLEN and AMM
AndesCore™ A46MP(V) 32-bit multicore CPU IP is an 8-stage superscalar processor with Vector Processing Unit (VPU) based on AndeSt…
Configurable RISC-V processor IP core
The NOEL3 is a configurable RISC-V processor IP core, described in VHDL.
MIPI I3C Master RISC-V based subsystem
RISC-V based MIPI I3C master interface has been developed to ease sensor system design architectures in mobile wireless products …
ISO26262 ASIL-B/D Compliant 32-bit RISC-V Core
The AndesCore™ D23-SE is a 32-bit 3-stage pipeline CPU IP core based on AndeStar™ V5 architecture for embedded applications with …