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Vendor:
Frontgrade Gaisler
Category:
CPU
Configurable RISC-V processor IP core
The NOEL3 is a configurable RISC-V processor IP core, described in VHDL.
Overview
The NOEL3 is a configurable RISC-V processor IP core, described in VHDL. The architecture is designed to utilize a small area footprint and to maintain execution predictability.
Key features
- 32-bit RISC-V processor – with configurable extensions
- RV32I: integer essential instructions
- M: integer multiplication and division
- A: atomic instructions for concurrency
- F: single-precision floating-point arithmetic
- C: compressed instructions to reduce code size
- B: bit manipulation instructions
- Zfh: half-precision floating-point operations.
- Zfa: additional floating-point instructions
- Debug module
- Deterministic execution time guaranteed by barrel processor architecture
- Configurable number of hardware execution threads (2 to 7)
- One thread is always reserved for SoC operations
- Utilizes tightly coupled memories instead of caches for predictable memory access
- RISC-V PLIC interrupt controller
- Support of AMBA AHB and APB-like deterministic bus for external memory and peripherals
- Companion IP cores for bus fabrics, peripherals, networking and security (GRLIB IP Library)
Block Diagram
NOEL3 block diagram
Specifications
Identity
Part Number
NOEL3
Vendor
Frontgrade Gaisler
Type
Silicon IP
Compute
CPU Architecture
RISC-V
Files
Note: some files may require an NDA depending on provider policy.
Provider
HQ:
Sweden
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Frequently asked questions about CPU IP cores
What is Configurable RISC-V processor IP core?
Configurable RISC-V processor IP core is a CPU IP core from Frontgrade Gaisler listed on Semi IP Hub.
How should engineers evaluate this CPU?
Engineers should review the overview, key features, supported foundries and nodes, maturity, deliverables, and provider information before shortlisting this CPU IP.
Can this semiconductor IP be compared with similar products?
Yes. Buyers can compare this product with similar semiconductor IP cores or IP families based on category, provider, process options, and structured technical specifications.