Phase-locked loop frequency synthesizer
PLL is an automatic control system adjusting controlled oscillator frequency to be equal to reference oscillator frequency multip…
- UMC
- 65nm
- Silicon Proven
Analog and Mixed-Signal IP cores are essential building blocks in modern SoC and ASIC designs, enabling seamless interaction between analog signals and digital processing.
These IP cores are widely used for data conversion (ADC, DAC), clock generation (PLL, oscillators), power management, and sensors & monitors such PVT monitors.
This catalog allows you to compare analog and mixed-signal IP cores from leading vendors by performance, power consumption, process node compatibility, and application domain.
Whether you are designing for wireless communication, automotive systems, consumer electronics, or industrial IoT, you can find the most suitable IP solutions for your requirements.
Phase-locked loop frequency synthesizer
PLL is an automatic control system adjusting controlled oscillator frequency to be equal to reference oscillator frequency multip…
PLL is an automatic control system adjusting controlled oscillator frequency to be equal to reference oscillator frequency multip…
The power on reset consists of a Schmitt trigger and simple logic for forced reset input, whish is forced asynchronous reset.
1.16 V Bandgap voltage reference
180TSMC_BVR_01 a bandgap voltage reference produces temperature independent voltage level around 1.16V (at Bangap_Vref pin) using…
10-bit 1-channel 100 MHz current DAC
The 10-bit dual high-speed DAC is based on current steering architecture, which provides high-speed conversion rate and good dyna…
12-bit 1-channel up to 1 MSPS R/2R DAC
090TSMC_DAC_02 is a 12-bit 1- channel R/2R DAC with sampling rate up to 1 MSPS.
10-bit 1-channel 1 to 100 MSPS current DAC
The 10-bit dual high-speed DAC is based on current steering architecture, which provides high-speed conversion rate and good dyna…
10-bit 1-channel 1 MSPS SAR ADC
090TSMC_ADC_02 is a 10-bit 1-channel successive-approximation register (SAR) analog to digital converter (ADC) circuit with sampl…
14-bit 1-channel 50 MSPS pipeline ADC
This ADC has architecture of pipelined ADC, pipeline ADC consists of a cascade of stages, each stage of the pipeline, excluding t…
800/1000 MHz DLL-based frequency multiplier
090TSMC_MDLL_01 is a clock multiplier accept an input clock and generates a phase-locked output clock at a multiple of the input …
7 to 150 MHz digitally controlled oscillator
180SMIC_OSC_02 is an OTA-C based oscillator with both analog and digital outputs.
The cell is combined into one block multiplexer and amplifier.
LDO voltage regulator (output voltage value 1.8 V, 2.4 V, 2.7 V, 3.0 V)
The regulator stabilizes the external voltage and forms an output level of the specified value.
LDO voltage regulator (output voltage value 2.7 V, 3.0 V)
The regulator stabilizes the external voltage and forms an output level of the specified value.
LDO voltage regulator (output voltage value 1.8 V, 2.1 V, 2.4 V, 2.7 V)
The regulator stabilizes the external voltage and forms an output level of the specified value.
LDO voltage regulator (output voltage 2.7 V)
The regulator stabilizes the external voltage (supply voltage) and forms an output level of the specified value.
LDO voltage regulator (output voltage value 1.0 V, 1.2 V, 1.5 V, 1.8 V)
The regulator stabilizes the external voltage and forms an output level of the specified value.
2.8 to 3.3 GHz Voltage controlled oscillator
Voltage–controlled oscillator (VCO) is the generator that can be tuned over a wide range of frequencies by applying a control vol…
1.19 V Reference voltage source
Reference voltage source forms temperature-compensated voltage level equal to the width of the band gap of silicon due to mutual …
The cell includes matched input, intermediate and output buffers with gain control, separated quadrature mixers and polyphase fil…