What is 800/1000 MHz DLL-based frequency multiplier?
800/1000 MHz DLL-based frequency multiplier is a DLL IP core from NTLab listed on Semi IP Hub. It is listed with support for tsmc Silicon Proven.
090TSMC_MDLL_01 is a clock multiplier accept an input clock and generates a phase-locked output clock at a multiple of the input …
090TSMC_MDLL_01 is a clock multiplier accept an input clock and generates a phase-locked output clock at a multiple of the input clock frequency. As with a DLL, each rising edge of the input clock zeros the phase error of the loop. Hence this circuit combines the low phase noise of a DLL with the clock multiplication ability of a PLL. A divide-by-M counter provides a programmable multiplication ratio for the MDLL.
The block is fabricated in TSMC 90 nm CMOS Logic Process.
| Foundry | Node | Process | Maturity |
|---|---|---|---|
| TSMC | 90nm | CIS | Silicon Proven |
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800/1000 MHz DLL-based frequency multiplier is a DLL IP core from NTLab listed on Semi IP Hub. It is listed with support for tsmc Silicon Proven.
Engineers should review the overview, key features, supported foundries and nodes, maturity, deliverables, and provider information before shortlisting this DLL IP.
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