Overcoming the Protocol Debug Challenge
January 23, 2015
In this talk, Synopsys R&D Director Bernie DeLay describes advanced methods for protocol-aware debug and how to use advanced debug techniques like protocol abstraction in a unified debug environment to find the root cause of errors for the most complex of bus and interface protocols
Related Semiconductor IP
- Mesochronous Bridge for PCIe/CXL
- AI-native GPU
- OpenGMSL Verification IP
- OpenGMSL Leaf IP
- FlexGen Multi-Die Smart Network-on-Chip (NoC) IP
Related Blogs
- Case Study: How To Use Protocol Debug Analyzer To Simplify Debug
- Visualizing Better Protocol Debug
- Protocol Debug for Complex SoCs
- Reduce Protocol Debug Time with Memory VIP
Latest Blogs
- Automated, Faster Specification to Sign-Off with IDS-AI
- NovaTech Automation Crius PIU: Bringing Conventional Instrument Transformers onto the IEC 61850 Process Bus
- Single Pair Ethernet and TSN: The In-Robot Network Behind the Next Humanoid Robots
- A design path to success exists for ultra-low-voltage SoCs
- Where Routine Flow Ends Veriest Formal Expertise Begins