Overcoming the Protocol Debug Challenge
January 23, 2015
In this talk, Synopsys R&D Director Bernie DeLay describes advanced methods for protocol-aware debug and how to use advanced debug techniques like protocol abstraction in a unified debug environment to find the root cause of errors for the most complex of bus and interface protocols
Related Semiconductor IP
- XTAL oscillator in TSMC-7nm
- GPU
- V-by-One Verification IP
- AI model compression IP
- Hardware compressed memory IP for CXL devices and chip-to-chip links
Related Blogs
- Case Study: How To Use Protocol Debug Analyzer To Simplify Debug
- Visualizing Better Protocol Debug
- Protocol Debug for Complex SoCs
- Reduce Protocol Debug Time with Memory VIP
Latest Blogs
- Reprogrammable Post-Quantum Security for SoCs: Why Crypto-Agility Matters
- Designing the Beam Steering Core for a C-Band AESA: A Look at VSI's VBF0644 GaAs Beamformer IC
- Secure Boot for embedded systems: Building a complete chain of trust
- Understanding PCIe 6.0 Power States: L0p vs L0s vs L1
- Crypto mining SoC unearths a need for custom IP