How AI Is Enabling Digital Design Retargeting to Maximize Productivity
Chips below 5nm are the fastest growing part of the semiconductor market, fueling today’s leading consumer devices and data centers. Not only are these devices getting smaller, but they’re also packed with greater functionality. Unfortunately, growing chip complexity is converging with shortages in technical talent, making it harder for companies to meet their aggressive market requirements.
The challenge is on for companies to drive greater efficiency and productivity into their organizations, and artificial intelligence (AI) has emerged as one way to do this. AI is already proving to be quite successful in helping to optimize designs to meet stringent power, performance, and area (PPA) targets. As global compute demand continues to outpace Moore’s law, companies need to figure out how to effectively leverage larger scale designs that are still viable and retarget them to similar process nodes that have available capacity, while taking advantage of the potential performance and power efficiency gains of a new node.
Such retargeting projects are often executed as a completely new project, with timelines and engineering resources matching those of the original project. The time and effort required has been impacting time to market, cost and, therefore, the viability of such product and business maneuvers.
Today, AI can make this chip design retargeting effort a more streamlined, cost-efficient reality.
To read the full article, click here
Related Semiconductor IP
- TSMC 7nm 0V75 / 0V9 ESD Local Clamp – Low Cap
- TSMC 65nm 3V3 ESD Local Clamp – Rad Hard
- TSMC 5nm 1V8, 1.2V and 0.9V ESD Local Protection – Low Cap
- TSMC 3nm 3V3 ESD Local Clamp
- TSMC 3nm 1V2 ESD Local Clamp – Low Capacitance
Related Blogs
- How Vehicle Design Is Influencing Processors
- How to Maximize PCIe 6.0's Advantages with End-to-End PCIe Design Solutions
- How to Design a RISC-V Space Microprocessor
- How Does Crocodile Dundee Relate to AI Inference?
Latest Blogs
- Beyond Trusted: What the NSA’s New Guidance Means for Hardware Security
- A scalable, shader-programmable vector graphics GPU core for low-power MCUs
- Navigating ISO 26262 Part 11: A Guide for Semiconductor Architects
- Embedded Security explained: Digital signatures
- Hardware security verification must go beyond functional testing