The 8b-10b Verification IP provides an effective &efficient way to verify the 8b-10b components of an IP or SoC.
- Verification IP
The 8b-10b Verification IP provides an effective &efficient way to verify the 8b-10b components of an IP or SoC.
The USB 3.0 PHY is a , mixed-signal semiconductor intellectual property (IP) solution, designed for single-chip integration into …
USB 3.1 Type-C PHY IP, Silicon Proven in SMIC 55LL
The USB3.1Type-C PHY is a high-speed, SERDES IP with high performance that was created for semiconductors that allow high-bandwid…
PCIe 3.0 Serdes PHY IP, Silicon Proven in GF 22FDX
This PCIe 3.0 PHY complies with the PCIe 3.0 Base Specification and supports the PIPE 4.3 interface specification.
PCIe 3.0 Serdes PHY IP, Silicon Proven in SMIC 12SF+/SF++
This Peripheral Component Interconnect Express (PCIe) x4 PHY is compliant with PCIe 3.0 Base Specification with support of PIPE 4…
USB 3.1 Type-C PHY IP, Silicon Proven in TSMC 55ULP
USB3.1Type-C PHY IP is a high performance high speed SERDES IP designed for chips that perform high bandwidth data communication …
USB 3.1 Type-C PHY IP, Silicon Proven in SMIC 12SF++
A high performance, high-speed SERDES IP known as USB3.1Type-C PHY was created for semiconductors that allow high bandwidth data …
USB 3.1 Type-C PHY IP, Silicon Proven in SMIC 14SF+
The USB3.1Type-C PHY is a high-performance, high-speed SERDES IP designed for semiconductors that support low-power, high-bandwid…
PCIe 3.0 Serdes PHY IP, Silicon Proven in SMIC 28SF
This Peripheral Component Interconnect Express (PCIe) x4 PHY is compliant with PCIe 3.0 Base Specification with support of PIPE 4…
USB 3.0/ PCIe 3.0/ SATA 3.0 Combo PHY IP, Silicon Proven in SMIC 14SF+
The combo PHY consist of Peripheral Component Interconnect Express (PCIe) compliant with PCIe 3.0 Base Specification with support…
Low jitter 4.96GHz to 5.6GHz PLL in TSMC N40
PMCC_PLL5GN40 is a PLL IP block which synthesizes low-jitter (
USB-C 3.1 SS/SSP PHY, Type-C IP (Silicon proven in UMC 55SP/ EF)
A high performance, high-speed SERDES IP called USB3.1Type-C PHY is created for semiconductors that provide high bandwidth data c…
PCIe 3.0 Serdes PHY IP, Silicon Proven in SMIC 14SFP
This Peripheral Component Interconnect Express (PCIe) x4 PHY is compliant with PCIe 3.0 Base Specification with support of PIPE 4…
8G Multiprotocol Serdes IP, Silicon Proven in SMIC 14SF+
High performance SERDES IP designed for chips that perform high bandwidth data communication while operating at low power consump…
USB 3.0 Gen1 / Gen2 Host Controller IP
We provide configurable and scalable USB 3.1 host/device/dualmode controller IP Cores for a wide range of applications.
Samsung 28nm FDSOI USB3.0 Type-C PHY
IP
GLOBALFOUNDRIES 22nm FDSOI USB3.0 PHY
IP
SMIC 28nm USB3.0 Dual Role PHY/Type-C
The USB3.0 Type-C PHY IP is designed to the USB 3.0, USB2.0 Specification and the USB Type-CTM USB Cable and Connector Specificat…
The Ceva-Waves Wi-Fi platforms portfolio provide a comprehensive selection of hardware IP and CPU-agnostic host software for ener…
A USB 3.0 Device IP Core that provides high performance SuperSpeed USB connectivity in a small footprint solution for quick and e…