Dolphin Technology offers high performance DDR4/3/2 SDRAM and LPDDR5/4x/4/3/2 SDRAM Memory Controller IP across a broad range of …
- DDR
Dolphin Technology offers high performance DDR4/3/2 SDRAM and LPDDR5/4x/4/3/2 SDRAM Memory Controller IP across a broad range of …
DDR SDRAM Controller - Pipelined for ispXPGA and ORCA4
DDR (Double Data Rate) SDRAM was introduced as a replacement for SDRAM memory running at bus speeds over 75MHz.
DDR SDRAM Controller - Non-Pipelined
This version of the Lattice DDR SDRAM Controller does not have pipelining, and is significantly smaller than the pipelined versio…
DDR SDRAM Controller - Pipelined
The Double Data Rate (DDR) Synchronous Dynamic Random Access Memory (SDRAM) Controller is a general-purpose memory controller tha…
AMBA AHB Bus to DDR SDRAM Controller
AMBA AHB Bus to DDR SDRAM Controller
DDR SDRAM Controller
Avalon Mobile DDR Memory Controller
The Microtronix Avalon Mobile DDR SDRAM Memory Controller IP Core is designed for building high-performance Avalon-MM / Avalon-ST…
DDR1 DDR2 SDRAM Memory Controller
Increasing SoC/ASIC devices' complexity also demands increase in memory bandwidth.
Avalon Multi-port SDRAM Memory Controller IP Core
The Microtronix Avalon Multi-port SDRAM Memory Controller IP Core is designed for maximizing the performance of an Altera Nios II…
Streaming Multi-port SDRAM Memory Controller
The Streaming Multi-port SDRAM Memory Controller IP Core provides a native RD or WR local port bus interface to SDRAM memory.
Motion-adaptive Video Deinterlacer IP Core
The DEINTERLACER_MA IP Core is a studio quality 24-bit RGB video deinterlacer capable of generating progressive output video at a…
SDRAM/SRAM/FLASH Memory Controller
Increasing SoC/ASIC devices' complexity also demands increase in memory bandwidth.
Advanced 2D Graphics Controller
BADGE works as a graphics engine in embedded systems, but doesn’t suffer from the short life cycles affecting the usual graphics …
Video Frame Buffer IP Core Rev. 2.0
The VID_FRAME_BUFFER (VFB) IP Core is a high-speed multi-format video frame buffer that samples an input video stream and buffers…
The UltraLong FFT IP Core uses an efficient Fast Fourier Transform (FFT) algorithm to provide multimillion-point discrete transfo…
DDR and DDR2 SDRAM Controller with ALTMEMPHY Intel® FPGA IP
The DDR and DDR2 SDRAM Controller with ALTMEMPHY Intel FPGA Intellectual Property (IP) provides simplified interfaces to industry…
The Lattice Double Data Rate (DDR3) Synchronous Dynamic Random Access Memory (SDRAM) Controller is a general-purpose memory contr…
The DDR PHY is designed to support LPDDR4, LPDDR4x and LPDDR5 SDRAM.
VeriSilicon SMIC 0.13um 1.2V/3.3V SSTLCOMBO_02 I/O Cell Library
VeriSilicon SMIC 0.13μm SSTL2/SSTL18 Combo I/O Cell Library developed by VeriSilicon is optimized for Semiconductor Manufacturing…
HEVC 4Kp60 Decoder, Supports 4:2:2, 10-bit decoding and 150Mbps bitrate
VYUsync’s HEVC 4Kp60, 4:2:2, 10-bit Decoder Core is a optimized universal video decompression engine.