VeriSilicon Microelectronics (Shanghai) Co., Ltd. (VeriSilicon, 688521.SH) is a leading public company that provides custom silicon solutions, leveraging its comprehensive and proprietary portfolio of semiconductor IPs.
VeriSilicon possesses six categories of in-house processing IPs, namely Graphics Processing Unit (GPU) IP, Neural Network Processing Unit (NPU) IP, Video Processing Unit (VPU) IP, Digital Signal Processing (DSP) IP, Image Signal Processing (ISP) IP, and Display Processing IP, as well as more than 1,700 analog and mixed-signal IPs, RF IPs, and interface IPs.
Leveraging its own IPs, VeriSilicon has developed a wealth of software and hardware custom chip design platforms targeting Artificial Intelligence (AI) applications, covering always-on ultralight spatial computing devices such as smartwatches and AI/AR glasses, high-efficiency edge computing devices such as AI PCs, AI phones, smart cars, and robots, as well as high-performance cloud computing devices like data centers and servers.
In response to the trend of System-on-Chip (SoC) evolving towards System-in-Package (SiP) driven by the demand for large computing power, VeriSilicon put forward the concepts of "IP as a Chiplet”, "Chiplet as a Platform", and "Platform as an Ecosystem”. The company keeps advancing the R&D and industrialization of its Chiplet technologies and projects from the perspective of interface IP, Chiplet architecture, advanced packaging technology, and others for AI-Generated Content (AIGC) and autonomous driving solutions.
Under its unique “Silicon Platform as a Service” (SiPaaS) business model, VeriSilicon serves a broad range of market segments, including consumer electronics, automotive electronics, computer and peripheral, industrial, data processing, Internet of Things (IoT), among others. Its main customers include fabless, IDM, system vendors (OEM/ODM), large internet companies, and cloud service providers.
Founded in 2001 and headquartered in Shanghai, China, VeriSilicon has 9 design and R&D centers, along with 11 sales and customer service offices worldwide. VeriSilicon currently has more than 2,000 employees.
Cost-efficiency, AI-based noise reduction IP
The AI-NR series IPs offer noise reduction solutions for optimizing image quality in low-light or complex lighting conditions.
High-efficiency, AI-based super resolution IP
The AI-SR series IPs offer super resolution solutions for enhancing video quality and pixel resolution, primarily used for post-p…
The USB 3.2 SuperSpeed Plus PHY provides a range of USB 3.2 Gen2 host and peripheral applications at up to 10 Gbps per lane, whic…
The USB 2.0 PHY is a Hi-Speed USB peripheral transceiver IP that implements the Intel® UTMI standard.
Physical Layer Interface for SD and eMMC Storage Devices
Physical Layer of LVDS Receiver
The LVDS transmitter is designed to support Single Link transmission between Host and Flat Panel Display with up to SXGA+ resolut…
This PLL IP is a programmable Analog PLL suitable for high speed clock generation.
The Power Management Platform offers Ultra Low Power LDOs, DCDCs, Battery Charger, System ON/OFF Control, Fault detection and so …
The Power Management Platform offers Ultra Low Power LDOs, DCDCs, Battery Charger, System ON/OFF Control, Fault detection and so …
The Power Management Platform offers Ultra Low Power LDOs, DCDCs, Battery Charger, System ON/OFF Control, Fault detection and so …
This 1-lane to 4-lane PCIE PHY includes all high-speed analog functions for high-speed data transport between chips over PCBs and…
NPU IP for Data Center and Automotive
The VIP9400 processing family offers programmable, scalable and extendable solutions for markets that demand real time and AI dev…
Low-Power Design for Multi-Display and High Quality Image Processing
Provides pixel processing functions such as cropping, color space conversion (CSC), alpha blending, 3D LUT, and flexible resizing.
Video Processing Unit (VPU) IP
High Number of Streams Decoder For Data Center
Hantro VC9800E enables up to 256 streams encoding with high video quality single-core solution, or multi-core solution, supportin…
SEC 5nm LVH 6T Multi-Bits Latch
SEC 5nm LVH 6 track High Density Multi-Bits Latch
TSMC 12nm FFC 6track Delay Cells
TSMC 12nm FFC 6 track High Density Delay Cells
SMIC 0.13um 1.2V<->3.3V level shifter,1.2v/3.3v operating voltage
SMIC 0.13um 1.2V3.3V Level Shfiter Library