What is Display Processing IP?
Display Processing IP is a Display Controller IP core from VeriSilicon Microelectronics (Shanghai) Co., Ltd. listed on Semi IP Hub.
Vendor:
VeriSilicon Microelectronics (Shanghai) Co., Ltd.
Category:
Display Controller
Display Processing IP
Low-Power Design for Multi-Display and High Quality Image Processing
Overview
VeriSilicon's Vivante DC9x00 series IPs are high-performance, low-power display processing IPs that deliver exceptional visual effects in different application scenarios. The DC9x00 series consists of DC9000L, DC9200L, DC9200, and DC9400, which provide maximum resolutions ranging from 4K to 16K. DC9000L and DC9200L are intended for edge servers, mainstream mobile phones, and smart homes. DC9200 and DC9400 target at automotive cockpits, data centers, high-end smartphones, and high-end smart TVs. This IP series can pre-process both RGB and YUV input formats for HDR display and provide blending and post-processing for the input data. Up to four output interfaces are provided at the back end to output RGB and YUV formats.
| Feature | DC9000L | DC9200L | DC9200 | DC9400 (Mobile Phones) |
DC9400 (Automotive Cockpits) |
| Target Ul performance for single output device | 4K@60 fps | 4K@60 fps | 16K@60 fps | 4K@120 fps | 4K@120 fps |
| Target Ul performance for multiple output devices | N/A | 4K@120 fps or 8K@30 fps |
8K@60 fps | 8K@60 fps | 8K@60 fps |
| Maximum number of supported output devices | 1 | 2 | 2 | 4 | 4 |
| Number of layers supported | 2 | 4 | 12 | 12 | 8 |
| 16-bit format support | No | No | Yes (FP16 only) | Yes (FP16 only) | Yes (FP16 only) |
| Pre-processing features | Scaling, rotation and flip, de-gamma, swizzle, and optional HDR | Scaling, rotation and flip, de-gamma, swizzle, and optional HDR | Scaling, rotation and flip, de-gamma, swizzle, and HDR | Scaling, rotation and flip, de-gamma, swizzle, and HDR | Scaling, rotation and flip, de-gamma, swizzle, and HDR |
| Post-processing features | Alpha blending, dither, splicer, gamma, and 3D LUT | Alpha blending, dither, splicer, gamma, and 3D LUT | Alpha blending, post-scaler, dither, splicer, gamma, 3D LUT, local contrast, sunlight readability, and sharpness | Alpha blending, post-scaler, dither, splicer, gamma, 3D LUT, local contrast, sunlight readability, and sharpness | Alpha blending, post-scaler, dither, splicer, gamma, 3D LUT, local contrast, sunlight readability, and sharpness |
| Pixel rate (pixels per cycle) |
2 | 2 | 2 | 2 | 2 |
Key features
Highlights
- Super DMA
- DEC400 compression
Advanced and Miscellaneous Features
- CRC
- Test pattern generator (TPG)
- Concurrent memory write-back to support offline processing and screen recording
- QoS management
- Shadow registers
Software Support
- OS: Linux, Android, Windows, and QNX
- API
- Vivante Programming DRM Display API
- Vivante Programming DPU OpenWFD API
Specifications
Identity
Part Number
Vivante DC9x00
Vendor
VeriSilicon Microelectronics (Shanghai) Co., Ltd.
Type
Silicon IP
Files
Note: some files may require an NDA depending on provider policy.
Provider
Frequently asked questions about Display Controller IP
How should engineers evaluate this Display Controller?
Engineers should review the overview, key features, supported foundries and nodes, maturity, deliverables, and provider information before shortlisting this Display Controller IP.
Can this semiconductor IP be compared with similar products?
Yes. Buyers can compare this product with similar semiconductor IP cores or IP families based on category, provider, process options, and structured technical specifications.