AXI2CHI · CHI-AXI · CHI-CPI · AXI4-SFI
- Protocol Bridge
After several years of incubation, Signature IP was founded in 2021 to develop advanced Network-on-Chip (NoC) solutions that form the basis for a full platform for SoC design. Signature IP features 120+ person-years of engineering leadership in interconnect, networking, datacenter, storage and connectivity IP, from specification to production. Our team has an extensive engineering background with expertise in interconnects, interfaces, bus protocols, CPUs and AI processing.
At Signature IP, "we strive to speed SoC design" by making the design of the NoC – the backbone of the chip – fast, flexible and configurable. By enabling our customers to easily change the NoC topology, experiment with different configuration settings, and instantly simulate the results to measure throughput and latency, we make it possible to explore the design space at the top level of the chip before making major architectural decisions. When customers are ready to prototype or implement the NoC, our pushbutton RTL generation connects directly with customers’ EDA and FPGA environments. Our SaaS tool architecture makes tool access easy and reduces the burden on their IT department.
AXI2CHI · CHI-AXI · CHI-CPI · AXI4-SFI
IO coherency · SLC integration · CHI RN-I
SLC / L3 · 4 MB–32 MB+ · CHI HN-F
Input/Output Memory Management Unit
SMMUv3 · Two-stage translation · DMA protection
Controller + ATC + ATS + DTI · CXL.io · CXL.cache · CXL.mem · Memory pooling
Controller + ATC + ATS + DTI · RC/EP · x1–x16 · 1 GHz · PCI-SIG certified
Coherent Network-on-chip (NoC) IP
UCIe D2D · CHI Rev E.b · Mesh & Ring · iNoCulator-generated RTL
Non-coherent Network-on-chip (NoC) IP
NC-NOC · AXI4 · Low power · All dies
10/100/1G · RGMII · MII · DMA-ready