After several years of incubation, Signature IP was founded in 2021 to develop advanced Network-on-Chip (NoC) solutions that form the basis for a full platform for SoC design. Signature IP features 120+ person-years of engineering leadership in interconnect, networking, datacenter, storage and connectivity IP, from specification to production. Our team has an extensive engineering background with expertise in interconnects, interfaces, bus protocols, CPUs and AI processing.
At Signature IP, "we strive to speed SoC design" by making the design of the NoC – the backbone of the chip – fast, flexible and configurable. By enabling our customers to easily change the NoC topology, experiment with different configuration settings, and instantly simulate the results to measure throughput and latency, we make it possible to explore the design space at the top level of the chip before making major architectural decisions. When customers are ready to prototype or implement the NoC, our pushbutton RTL generation connects directly with customers’ EDA and FPGA environments. Our SaaS tool architecture makes tool access easy and reduces the burden on their IT department.
Cloud-active NOC configuration tool for generating and simulating Coherent and Non-Coherent NoCs
iNoCulator is a cloud-active EDA tool that is used to define the topology of a NoC quickly and easily, configure its parameters a…
The CXL Controller IP is micro-architected with power, performance, and area optimization for high bandwidth, minimum latency, an…
Our latest PCIe gen 6 controller IP, which is "NoC aware", provides a high-speed interface for efficient data transfer and system…
Coherent Network-on-chip (NoC) IP
C-NoC is a layered, scalable, configurable, and physically aware configurable NoC.
Non-coherent Network-on-chip (NoC) IP
NC-NoC is a layered, scalable, physically aware configurable NoC supporting multiple clocking schemes for SoCs that do not requir…