IO coherency · SLC integration · CHI RN-I
Maintains coherency for IO devices accessing cached memory: allows non-coherent DMA masters to participate in the CHI coherency protocol without a full cache implementation.
Key specifications
| Purpose | IO coherency |
| Protocol | CHI RN-I |
| Integration | With SLC/L3 |
| Masters | Non-coherent DMA |
| Deployment | Compute silicon |
| Sign-off | Siemens Questa |
Technical details
| CHI node | RN-I |
| Snoops | Handled on behalf |
| Configuration | APB3 |
| DMA masters | Configurable |
| Silicon | Compute silicon |
| Works with | SLC / L3 |
Proxy Cache is a Coherency IP core from Signature IP Corporation listed on Semi IP Hub.
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