Unified Architecture for Cutting-Edge Intelligence
- 3 variants
Unified Architecture for Cutting-Edge Intelligence
Configurable RISC-V processor IP core
The NOEL3 is a configurable RISC-V processor IP core, described in VHDL.
MIPI I3C Master RISC-V based subsystem
RISC-V based MIPI I3C master interface has been developed to ease sensor system design architectures in mobile wireless products …
ISO26262 ASIL-B/D Compliant 32-bit RISC-V Core
The AndesCore™ D23-SE is a 32-bit 3-stage pipeline CPU IP core based on AndeStar™ V5 architecture for embedded applications with …
The TT-Ascalon™ is an Out-of-Order, superscalar, 8-wide decode processor based on the RISC-V RVA23 profile, co-designed and optim…
RISC-V Real-time Processor
RISC-V High Performance Processor
RISC-V High Performance Processor
32-bit RISC-V microcontroller.
64-bit RISC-V embedded core with in-order single issue pipeline
64-bit RISC-V embedded core with in-order single issue pipeline.
32-bit RISC-V embedded core with in-order single issue pipeline
32-bit RISC-V embedded core with in-order single issue pipeline.
Streamline Ventana technology integration into high-performance systems, fully leveraging third-party IP, while applying RISC-V s…
The second-generation high-performance RISC-V CPU delivers a major leap in compute capability, designed for deployment across dat…
Compact and Performance Efficiency 32-bit RISC-V Core
The AndesCore™ N225 is a 32-bit 3-stage pipeline CPU IP core based on AndeStar™ V5 architecture for embedded applications with sm…
64-bit RISC-V CPU with M, Zicsr extensions and External Debug support
The DRV64IMZicsr is a 64-bit RISC-V CPU with M, Zicsr extensions and External Debug support.
Low-Power Deeply Embedded RISC-V Processor
The BA53 is a configurable, low-power, deeply-embedded RISC-V processor IP core.
Low Power RISCV CPU IP
Compact, Secure and Performance Efficiency 32-bit RISC-V Core
AndesCore™ D23 is a 32-bit 3-stage pipeline CPU IP core based on AndeStar™ V5/V5e architecture for embedded applications with sma…
64-bit RISC-V Multicore Processor with 1024-bit Vector Extension
AndesCore™ AX45MPV 64-bit multicore CPU IP is an 8-stage superscalar processor with Vector Processing Unit (VPU) based on AndeSta…
Highly efficient out-of-order RISC-V vector application processor series
The SiFive Performance™ P400-Series application processors are SiFive’s first efficiency-focused Out-of-Order processors.
RISC-V CPU IP With ISO 26262 Automotive Functional Safety Compliant
AndesCore™ N25F-SE is a 32-bit CPU IP core that supports ISO 26262 ASIL B level functional safety for automotive applications.