Vendor: Semidynamics Category: NPU

All-In-One RISC-V NPU

Unified Architecture for Cutting-Edge Intelligence

Overview

Unified Architecture for Cutting-Edge Intelligence

Customizable Throughput  
Offers modular scaling to meet extreme processing demands, from localized devices to massive infrastructure

Seamless Hardware Fusion 
Integrates multiple compute engines into one system to remove bottlenecks and ensure instantaneous execution

Open-Source Flexibility 
Provides a fully programmable environment that eliminates proprietary restrictions for modern language models and deep learning

Standard Data Type Support

  • Activations: INT8, INT16, INT32, INT64, FP16, FP32, FP64 (*)
  • Convolutions: INT4, INT8, INT16, FP16, BF16 (*)

(*) Configuration options available

Architecture Highlights

  • Scalable NPU Core for AI
  • Configurable from 8-64 TOPS
  • RISC-V Based All-In-One architecture (CPU, Vector, and Tensor)

Block Diagram

Cervell™ block diagram

Benefits

All-in-One Processing

  • CPU, Vector, and Tensor seamlessly combined for zero-latency AI workload

Standard RISC-V AI Acceleration

  • Fully programmable, no vendor lock-in

Ideal for

  • LLMs, Deep Learning, Edge AI, AI Datacenters

High Efficiency

  • AI acceleration optimized for LLMs, Recommendation Systems, and Deep Learning

Specifications

Identity

Part Number
Cervell™
Vendor
Semidynamics
Type
Silicon IP

Files

Product Sheet Download

Note: some files may require an NDA depending on provider policy.

Variants in this family

Part Number Short Description
Cervell™ NPU C1 NPU IP Core for Edge AI
Cervell™ NPU C8 Higher‑Throughput NPU IP Core
Cervell™ NPU C32 Clustered IP to Scale Throughput

Provider

Semidynamics
HQ: Spain

Learn more about NPU IP core

Semidynamics brings its full inference stack to ISC HPC 2026

Memory-centric challenger brings its full silicon-to-rack inference stack to Hamburg, arguing that inference economics turn on memory architecture and capacity: the ability to actually use the available TOPS, service large KV-caches, run multi-trillion-parameter models and meet the exploding memory demands of agentic AI. To deliver that capacity, Semidynamics builds a novel architecture around next-generation LPDDR.

Semidynamics Welcomes Iakovos Stamoulis as Chief Technology Officer

Iakovos brings more than 25 years of experience in computer graphics and semiconductors, with a strong record of converting advanced concepts into commercial products. His deep expertise in graphics processing units (GPUs)—the foundational architecture of modern AI acceleration—makes him uniquely qualified to lead Semidynamics' technical roadmap.

Frequently asked questions about NPU IP cores

What is All-In-One RISC-V NPU?

All-In-One RISC-V NPU is a NPU IP core from Semidynamics listed on Semi IP Hub.

How should engineers evaluate this NPU?

Engineers should review the overview, key features, supported foundries and nodes, maturity, deliverables, and provider information before shortlisting this NPU IP.

Can this semiconductor IP be compared with similar products?

Yes. Buyers can compare this product with similar semiconductor IP cores or IP families based on category, provider, process options, and structured technical specifications.

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