PCIe 2.0 Serdes PHY IP, Silicon Proven in TSMC 55ULP/65ULP
The PCIe2.0 PHY IP is a physical layer (PHY) IP solution designed for mobile and consumer applications.
- TSMC
- 55nm
- ULP
- In Production
Interface and connectivity IP cores enable communication between components, chips, and systems in modern SoC and ASIC designs.
These IP cores implement a wide range of communication standards including high-speed serial interfaces, on-chip interconnects, chiplet and die-to-die links, and low-speed control interfaces.
This catalog allows you to explore and compare connectivity IP cores from leading vendors based on bandwidth, latency, protocol support, and process node compatibility.
Whether you are designing high-performance computing systems, data center processors, automotive platforms, or embedded systems, you can find the right interface IP for your communication requirements.
PCIe 2.0 Serdes PHY IP, Silicon Proven in TSMC 55ULP/65ULP
The PCIe2.0 PHY IP is a physical layer (PHY) IP solution designed for mobile and consumer applications.
PCIe 2.0 Serdes PHY IP, Silicon Proven in TSMC 22ULP/ULL
The PCIe2.0 PHY IP is an all-in-one physical layer (PHY) IP solution for mobile and consumer applications.
PCIe 4.0 Serdes PHY IP, Silicon Proven in UMC 28HPC
With compliance for PIPE 4.4 interface spec, Peripheral Component Interconnect Express (PCIe) Gen4 PHY IP complies with PCIe 4.0 …
PCIe 2.0 Serdes PHY IP, Silicon Proven in TSMC 28HPCP
The PCIe2.0 PHY IP is a fully - featured physical layer (PHY) IP solution for mobile and consumer applications.
PCIe 3.0 Serdes PHY IP, Silicon Proven in UMC 40LP
This PCIe 3.0 Base Specification-compliant Peripheral Component Interconnect Express Gen3 PHY supports the PIPE 4.3 interface sta…
PCIe 3.0 Serdes PHY IP, Silicon Proven in UMC 28HPC
This PCIe 3.0 Base Specification-compliant Peripheral Component Interconnect Express Gen3 PHY supports the PIPE 4.3 interface sta…
The architecture utilizing DSP techniques demonstrated excellent scalability over data rates and insertion losses, superior relia…
Display Port v1.4 Rx PHY & Controller IP, Silicon Proven in TSMC 40LP
This Display Port v1.4 Rx PHY IP Core supports Channel capacity, offering programmable analog characteristics like CDR Bandwidth,…
USB 3.0 PHY IP, Silicon Proven in TSMC 28HPC+
A Universal Serial Bus (USB) transceiver which is provided for peripheral devices.
SD4.1 UHS-II IP utilizes distinctive SerDes technology to attain a speed of 312MB/s for UHS-II while maintaining low power consum…
MIPHY Consumer SerDes IP, Silicon Proven in ST 28FDSOI
Consumer Multimedia Applications: Wide support of Consumer PHY standards such as PCIe Gen1/2/3, USB 3.0 Super Speed, JESD204B, SA…
Flexible Deterministic Ethernet IP Core with TSN (Time Sensitive Networking)
TTTech Industrial’s Flex IP Core is a flexible design IP for customized chip or ASIC products.
3/5 Port Deterministic Ethernet IP Solution with TSN (Time Sensitive Networking)
TTTech Industrial’s Edge IP Solution is the simple way to add TSN (Time Sensitive Networking) Ethernet functionality to switched …
Display Port v1.4 Rx PHY & Controller IP, Silicon Proven in UMC 28HPC
The capacity of the Display Port 1.4 Rx IP Channel is supported.
PCIe 4.0 Serdes PHY IP, Silicon Proven in TSMC 12FFC
This Peripheral Component Interconnect Express (PCIe) x4 PHY is compliant with PCIe 4.0 Base Specification with support of PIPE 4…
Arasan Chip Systems, the provider of IP for Mobile Storage Standards, presents its latest xSPI Master IP for access to NOR Flash …
The IntelliProp IPC-GZ201A-ZM Gen-Z Switch is an IP Core that allows companies to build Gen-Z compliant components.
Our MIPI-D-PHY IP is a high-frequency low-power, low-cost, source-synchronous, Physical Layer that supports the MIPI Alliance Sta…
10M/100M/1G Managed Ethernet Switch IP Core
Multi-port, multi-rate managed ethernet switch with a rich set of layer-2 configurable features
HDMI transmitter PHY (Physical layer) IP core which is fully amenable with HDMI 1.4/2.0 specification.HDMI transmitter PHY which …