LVDS serdes 4:28 channel decompression RX 8-150Mhz
FPD-LINK 24-bit color, 8-150Mhz Receiver LVDS serdes 4:28 channel decompression RX 56-1050 Mbs x4 V-Trans 's FPD Link Receiver Ma…
- Single-Protocol PHY
- now
- IEEE std 1596.3-1996,ANSI/T…
Single-Protocol PHY IP cores help engineering teams evaluate reusable semiconductor IP for advanced chip designs.
This page lets you compare Single-Protocol PHY IP offerings from multiple vendors based on functionality, integration requirements, performance targets, power efficiency, and process compatibility.
LVDS serdes 4:28 channel decompression RX 8-150Mhz
FPD-LINK 24-bit color, 8-150Mhz Receiver LVDS serdes 4:28 channel decompression RX 56-1050 Mbs x4 V-Trans 's FPD Link Receiver Ma…
LVDS serdes 28:4 channel compression TX 20-170Mhz
LVDS serdes 28:4 channel compression TX 140-1190 Mbs x4 FPD-LINK Transmitter 24-bit color 20-170Mhz This FPD Link Transmitter Mac…
Dual Parallel to Serial ATA 1.5/3.0Gb/s PHY Core
TRC3002CSA is a Dual Serial ATA (SATA) PHY core for interfacing serial data between Storage Device and external 2-port PHY.
SMIC 0.18um LVDS Transceiver/Receiver
This transmitter provides CMOS signal to LVDS, and the receiver provides LVDS signal to CMOS.
The USB Super-Speed+ PHY IP is a compact and power-efficient interface solution that fully supports the USB 3.2 Gen1 and Gen2 spe…
PHY IO for PSRAM memory PHY, 1066Mbps on TSMC 22nm
The PHYIOs is used to transfer the Command/Address/Clk and Data between the memory controller PHY and the PSRAM device.
The USB PHY IP is UTMI interface compatible and a dedicated circuit for full-function USB 2.0 transceivers.
PCIe 6.0 PHY, SS SF2A x4 1.2V, N/S for Automotive, ASIL B Random, AEC-Q100 Grade 2
The multi-channel Synopsys PHY IP for PCI Express® (PCIe®) 6.0 meets today’s demands for higher bandwidth and power efficiency ac…
The Embedded DisplayPort (eDP) 1.3 Transmitter PHY is a high-performance interface IP designed to enable the transmission of vide…
LVDS Driver/Buffer
LVDS Receiver
LVDS Transmitter
USB1.1 FS/LS PHY, TSMC 55ULP_EF
M31 provides customers with a unique USB 1.1 PHY IP for IoT applications.
M31 provides customers with a unique USB 1.1 PHY IP for IoT applications.
M31 provides customers with a unique USB 1.1 PHY IP for IoT applications.
USB1.1 FS/LS PHY, TSMC 40ULP_EF
M31 provides customers with a unique USB 1.1 PHY IP for IoT applications.
M31 provides customers with a unique USB 1.1 PHY IP for IoT applications.
USB2.0 Dual-Role PHY, SMIC 55LL
M31 provides customers the next generation of USB 2.0 IP with an extremely compact die area and lower active and suspend power co…
USB2.0 Dual-Role PHY, SMIC 40LL
M31 provides customers the next generation of USB 2.0 IP with an extremely compact die area and lower active and suspend power co…
USB2.0 Dual-Role PHY, UMC 28HPC+, N/S orientation
M31 provides customers the next generation of USB 2.0 IP with an extremely compact die area and lower active and suspend power co…