Vendor: MSquare Category: Single-Protocol PHY

ONFI 5.0 PHY IP

MSquare offers a silicon-proven ONFI 5.0 PHY IP that supports all modes of the Open NAND Flash Interface (ONFI) 5.0 specification.

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Overview

MSquare offers a silicon-proven ONFI 5.0 PHY IP that supports all modes of the Open NAND Flash Interface (ONFI) 5.0 specification. ONFI is an interface that connects external flash particles (NAND Flash) and internal flash controller (NAND Controller), commonly used in Solid State Drives (SSD) and embedded memory (eMMC) products. To facilitate customer implementation, the MSquare's ONFI 5.0 PHY supports expandable channels and customizable CE/RB Pad Numbers.

Key features

  • Compliant with ONFI 5.0 specification
  • Supports NV-DDR2 mode
  • Supports NV-DDR3, NV-LPDDR4, with a maximum rate of 2400MT/s
  • Supports PHY Independent TX/RX Training mode
  • Supports DFI with 1:1 / 1:2 clock ratio mode
  • Supports self-test mode with built-in BIST
  • Supports loopback test with built-in PRBS
  • Supports ODT programmable and ZQ calibration
  • Integrated low-jitter PLL & DLL

Block Diagram

ONFI 5.0 PHY block diagram

Specifications

Identity

Part Number
ONFI 5.0 PHY
Vendor
MSquare
Type
Silicon IP

Files

Product Sheet Download

Note: some files may require an NDA depending on provider policy.

Provider

MSquare
HQ: China
Contact MSquare

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Frequently asked questions about Single-Protocol PHY IP

What is ONFI 5.0 PHY IP?

ONFI 5.0 PHY IP is a Single-Protocol PHY IP core from MSquare listed on Semi IP Hub.

How should engineers evaluate this Single-Protocol PHY?

Engineers should review the overview, key features, supported foundries and nodes, maturity, deliverables, and provider information before shortlisting this Single-Protocol PHY IP.

Can this semiconductor IP be compared with similar products?

Yes. Buyers can compare this product with similar semiconductor IP cores or IP families based on category, provider, process options, and structured technical specifications.

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