eUSB2 v1.1 Dual-Role, repeater/native mode PHY, SamSung 3LPE, 1.2V, N/S orientation
Embedded USB2 (eUSB2) is a new generation specification proposed by USB Association that extends USB 2.0 specification and uses 1…
- Single-Protocol PHY
Single-Protocol PHY IP cores help engineering teams evaluate reusable semiconductor IP for advanced chip designs.
This page lets you compare Single-Protocol PHY IP offerings from multiple vendors based on functionality, integration requirements, performance targets, power efficiency, and process compatibility.
eUSB2 v1.1 Dual-Role, repeater/native mode PHY, SamSung 3LPE, 1.2V, N/S orientation
Embedded USB2 (eUSB2) is a new generation specification proposed by USB Association that extends USB 2.0 specification and uses 1…
eUSB2 v1.2 Dual-Role, repeater/native mode PHY, SamSung SF3P, 1.0V, N/S orientation
Embedded USB2 (eUSB2) is a new generation specification proposed by USB Association that extends USB 2.0 specification and uses 1…
eUSB2 v1.1 Dual-Role, repeater/native mode PHY, TSMC N5, 1.2V, N/S orientation
Embedded USB2 (eUSB2) is a new generation specification proposed by USB Association that extends USB 2.0 specification and uses 1…
USB1.1 FS/LS PHY, TSMC 55ULP_EF
M31 provides customers with a unique USB 1.1 PHY IP for IoT applications.
M31 provides customers with a unique USB 1.1 PHY IP for IoT applications.
M31 provides customers with a unique USB 1.1 PHY IP for IoT applications.
USB1.1 FS/LS PHY, TSMC 40ULP_EF
M31 provides customers with a unique USB 1.1 PHY IP for IoT applications.
M31 provides customers with a unique USB 1.1 PHY IP for IoT applications.
USB2.0 Dual-Role PHY, SMIC 55LL
M31 provides customers the next generation of USB 2.0 IP with an extremely compact die area and lower active and suspend power co…
USB2.0 Dual-Role PHY, SMIC 40LL
M31 provides customers the next generation of USB 2.0 IP with an extremely compact die area and lower active and suspend power co…
USB2.0 Dual-Role PHY, UMC 28HPC+, N/S orientation
M31 provides customers the next generation of USB 2.0 IP with an extremely compact die area and lower active and suspend power co…
USB2.0 Dual-Role PHY, TSMC 55EF
M31 provides customers the next generation of USB 2.0 IP with an extremely compact die area and lower active and suspend power co…
USB2.0 Dual-Role PHY, TSMC 12E, N/S orientation, type-C
M31 provides customers the next generation of USB 2.0 IP with an extremely compact die area and lower active and suspend power co…
The PCI Express® (PCIe®) 6.2 Switch is a customizable, multiport embedded switch for PCIe designed for ASIC implementations.
The DP and eDP TX/RX PHY IP provides a compact, low-power solution for high-speed external display interfaces.
DisplayPort 1.2a TX PHY targeting 28nm Artix-7
DisplayPort 1.2a compatible AMD/Xilinx hardware specific Hardware proven on AMD/Xilinx 28nm FPGA fabric Fabric: 28nm Artix-7 Tran…
10Base-T/100Base-TX Fast Ethernet PHY
10Base-T/100Base-TX Fast Ethernet PHY
10Base-T/100Base-TX Fast Ethernet PHY
10Base-T/100Base-TX Fast Ethernet PHY
10Base-T/100Base-TX Fast Ethernet PHY
10Base-T/100Base-TX Fast Ethernet PHY
Gigabit Ethernet PHY