The Flexibilis Redundant Switch (FRS) is a triple-speed (10Mbps/100Mbps/1Gbps) Ethernet Layer-2 switch that supports new protocol…
- Ethernet
- Now
- Compatible with IEC 62439-3…
Ethernet IP cores enable high-speed serial connectivity for bandwidth-intensive systems in modern SoC and ASIC designs.
These IP cores support packet-based networking from embedded links to high-throughput infrastructure interfaces, helping designers build scalable, standards-based interconnect for infrastructure, storage, multimedia, or advanced embedded applications
This catalog allows you to compare Ethernet IP cores from leading vendors based on throughput, latency, power efficiency, and process node compatibility.
Whether you are designing networking equipment, data centers, industrial networks, or automotive connectivity, you can find the right Ethernet IP for your application.
The Flexibilis Redundant Switch (FRS) is a triple-speed (10Mbps/100Mbps/1Gbps) Ethernet Layer-2 switch that supports new protocol…
The AXI Ethernet Lite MAC supports the IEEE Std.
The SPI4 Intellectual Property (IP) core enables user instantiation of OIF-compliant System Packet Interface Level 4 Phase 2 Revi…
The SFI-5 Intellectual Property (IP) core enables user instantiation of an OIF-compliant SERDES Framer Interface Level 5 (SFI-5) …
The 2.5Gb MAC core can support data rates of 1Gbps or 2.5Gbps in LatticeSC/M™ devices.
Xilinx provides a no charge Dune Network compliant RXAUI core to ensure first time success in your design.
Virtex-6 Embedded Tri-mode Ethernet MAC Wrapper
Xilinx provides a Virtex-6 Integrated Tri-mode Ethernet MAC core with integrated serial interface to ensure first time success in…
Free LogiCORE™ IP design enabling the use of multi-gigabit transceivers for Xilinx FPGA Aurora is a LogiCORE™ IP designed to enab…
Ethernet AVB Endpoint IP LogiCORE
Ethernet AVB has been merged with the AXI TEMAC IP and AXI Ethernet IP.
Reduced Media Independent Interface (RMII)
The MII to RMII LogiCORE is a "shim" core which converts a traditional 16-pin Media Independent Interface (MII) on a Xilinx 10/10…
Included in EDK at no additional charge The Ethernet Lite MAC (Media Access Controller) is designed to incorporate the applicable…
Virtex-5 Embedded Tri-mode Ethernet MAC Wrapper
The CORE Generator™ Virtex®--5 Embedded Tri-mode Ethernet Media Access Controller (MAC) Wrapper automates the generation of HDL w…
The HiGig™ MAC transmits and receives data between a host processor and a HiGig™ / Ethernet network that enables networking custo…
Tri-Speed Ethernet MAC Core IP
The Tri-Speed Ethernet Media Access Controller (TSMAC) IP core can be configured to operate in either the Gigabit mode (1000Mbits…
XPS_LL_TEMAC Ethernet core provides a control interface to internal registers via a 32-bit Processor Local Bus (PLB) Version 4.6 …
Embedded Tri-mode Ethernet MAC Wrapper
The CORE Generator™ Embedded Tri-mode Ethernet Media Access Controller (MAC) Wrapper automates the generation of HDL wrapper file…
A Free parameterizable core that can be used with Gigabit Ethernet MAC, soft and Embedded Tri-Mode Ethernet MAC Cores.
Tri-Mode Ethernet Media Access Controller (TEMAC)
The TEMAC core is ideally suited for the development of high density Gigabit Ethernet communications and storage equipment.
SMS4000 is a fully integrated CMOS transceiver compliant with IEEE 802.3z standard.
10 Gigabit Ethernet Media Access Controller (10GEMAC)
For UltraScale and UltraScale+ device support, refer to the 10G/25G Ethernet Subsystem Designed to the IEEE 802.3-2012 specificat…