25G-1K Sess. TCP + UDP Offload Engine
INT 25011 is the only SOC IP Core that implements a full 25G bit TCP Stack in Handcrafted, Ultra-Low latency and High Performance…
- Ethernet
Ethernet IP cores enable high-speed serial connectivity for bandwidth-intensive systems in modern SoC and ASIC designs.
These IP cores support packet-based networking from embedded links to high-throughput infrastructure interfaces, helping designers build scalable, standards-based interconnect for infrastructure, storage, multimedia, or advanced embedded applications
This catalog allows you to compare Ethernet IP cores from leading vendors based on throughput, latency, power efficiency, and process node compatibility.
Whether you are designing networking equipment, data centers, industrial networks, or automotive connectivity, you can find the right Ethernet IP for your application.
25G-1K Sess. TCP + UDP Offload Engine
INT 25011 is the only SOC IP Core that implements a full 25G bit TCP Stack in Handcrafted, Ultra-Low latency and High Performance…
10 G bit TCP Offload Engine + PCIe/DMA SOC IP
INT 20012 is the only SOC IP Core that implements a full 10G bit TCP Stack in Handcrafted, Ultra-Low Latency and Very High Perfor…
10G-16K Sess. TCP + UDP Offload engine (INT-20011-16K)
INT 20011 is the only SOC IP Core that implements a full 10G bit TCP Stack in Handcrafted, Ultra-Low latency and High Performance…
10G TCP Offload Engine+MAC+Host_IF Ultra-Low Latency (SXTOE)
INT 20011 is the only SOC IP Core that implements a full 10G bit TCP Stack in Handcrafted, Ultra-Low latency and High Performance…
10G UDP Offload Engine UOE+MAC+PCIe+Host_IF Ultra-Low Latency (SXUOE+PCIe)
INT 15012 is the only SOC IP Core that implements a full 10G bit UDP Stack in Handcrafted, Ultra-High Performance, , Flexible and…
10G UDP Offload Engine UOE+MAC+Host_IF Ultra-Low Latency (SXUOE)
INT 15011 is the only SOC IP Core that implements a full 10G bit UDP Stack in Handcrafted, Ultra-High Performance, , Flexible and…
1-Gbit Network Search Engine Controller
customizable hardware IP block.
No charge paramaterizable core which utilizes the serial I/O transceivers available in the Kintex® UltraScale™, Virtex® UltraScal…
UltraScale Integrated 100G Ethernet MAC/PCS
Xilinx offers an integrated 100 Gigabit per second (Gbps) Ethernet Media Access Controller (MAC) and Physical Coding Sublayer (PC…
The HARD_TEMAC described in this document has been designed incorporating the applicable features described in IEEE Std.
AXI 1G/2.5G Ethernet Subsystem
The AXI Ethernet Subsystem provides a control interface to internal registers via a 32-bit AXI4-Lite Interface subset.
The Xilinx® LogiCORE™ IP 10G/25G Ethernet solution provides a 10 Gigabit or 25 Gigabit per second (Gbps) Ethernet Media Access Co…
Unmanaged Ethernet Switch IP core (UES) implements a plug-and-play Ethernet switch on reconfi gurable devices.
The SoC-e PROFINET Switch IP core is an Intellectual Property (IP) Core for FPGAs.
Xilinx 40G/100G Ethernet LogiCORE based on Sarance Technologies Best-In-Class Intellectual Property Xilinx High-Speed Ethernet Lo…
triple-speed (10Mbps/100Mbps/1Gbps) Ethernet controller
The Flexibilis Ethernet Controller (AFEC) is a triple-speed (10Mbps/100Mbps/1Gbps) Ethernet controller IP block that can be emplo…
Gigabit Ethernet Media Access Controller
Implements an Ethernet Media Access Controller compatible with the 10/100 Mbps IEEE 802.3 and 1Gbps IEEE 802.3-2002 specification…
Xilinx provides a GMII to RGMII LogiCORE for connecting to the Zynq-7000 integrated Ethernet MAC The Xilinx LogiCORE™ IP Gigabit …
The Xilinx Ethernet Quad Serial Gigabit Media Independent Interface PCS/PMA or QSGMII IP LogiCORE™ IP provides an Ethernet Physic…
UDP/IP Hardware Protocol Stack
Implements a UDP/IP hardware protocol stack that enables high-speed communication over a LAN or a point-to-point connection.