Scale-Up Ethernet Ecosystem Ramps Up: Cadence ESUN Controller IP Available
Building on its High-Speed Ethernet controller IP family, Cadence provides ESUN-ready controller IP for next-generation AI scale-up networking.
Vendor:
Flexibilis Oy
Category:
Ethernet
triple-speed (10Mbps/100Mbps/1Gbps) Ethernet controller
The Flexibilis Ethernet Controller (AFEC) is a triple-speed (10Mbps/100Mbps/1Gbps) Ethernet controller IP block that can be emplo…
Overview
The Advanced Flexibilis Ethernet Controller (AFEC) is a triple-speed (10Mbps/100Mbps/1Gbps) Ethernet controller IP block that can be employed with programmable hardware and ASICs. Together with an Ethernet Physical layer device, AFEC provides the functionality of an Ethernet Network Interface Controller. For connecting to an Ethernet PHY device, AFEC implements a standard MII/GMII interface.
Key features
- To achieve gigabit transfer rates in real life and to make it possible to also use less powerful CPUs, AFEC has several features that help minimize the CPU load:
- Bus master DMA transfer for both RX and TX data
- RX and TX data can be located at any byte alignment, eliminating the need for the CPU to copy the data to a different location for the DMA
- RX and TX scatter gather makes it possible to have the data in several fragments in memory
- Delayed interrupts to minimize interrupt load on the CPU
- Other standard features of AFEC include:
- Triple-speed Full-Duplex operation
- Copper and fiber Ethernet support
- Supports direct connection of SFP and SFF modules to FPGA IO
- IEEE 1588 Precision Time Protocol support
- Time stamping of all Ethernet frames sent and received
- Separate DMA controller for RX and TX
- Adjustable RX and TX FIFO thresholds
- Automatic CRC calculation and CRC error detection
- Register interface for accessing control and status registers
- Descriptor based RX and TX data handling
- Adjustable interrupt delay
- Integrated MDIO controller for the CPU to enable access to registers of the connected PHY devices
- The FPGA resource usage of AFEC is about 4,500 FPGA registers.
Specifications
Identity
Part Number
AFEC
Vendor
Flexibilis Oy
Type
Silicon IP
Videos
This video presents some basics of High-availability Seamless Redundancy (HSR) and Parallel Redundancy Protocol (PRP).
Files
Note: some files may require an NDA depending on provider policy.
Provider
HQ:
Finland
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Frequently asked questions about Ethernet IP cores
What is triple-speed (10Mbps/100Mbps/1Gbps) Ethernet controller?
triple-speed (10Mbps/100Mbps/1Gbps) Ethernet controller is a Ethernet IP core from Flexibilis Oy listed on Semi IP Hub.
How should engineers evaluate this Ethernet?
Engineers should review the overview, key features, supported foundries and nodes, maturity, deliverables, and provider information before shortlisting this Ethernet IP.
Can this semiconductor IP be compared with similar products?
Yes. Buyers can compare this product with similar semiconductor IP cores or IP families based on category, provider, process options, and structured technical specifications.