Vendor: Xilinx, Inc. Category: Ethernet

Reduced Media Independent Interface (RMII)

The MII to RMII LogiCORE is a "shim" core which converts a traditional 16-pin Media Independent Interface (MII) on a Xilinx 10/10…

Overview

The MII to RMII LogiCORE is a "shim" core which converts a traditional 16-pin Media Independent Interface (MII) on a Xilinx 10/100 Ethernet MAC core to a a 6-pin Reduced Media Independent Interface (RMII) interface, allowing the MAC to connect to RMII compliant PHYs. A fixed 50 MHz reference clock synchronizes the MII_to_RMII with both interfaces.

Key features

  • Option to specify fixed 10 or 100 Mbit per second throughput
  •  Automatic detection of Receive side throughput 
  • Fixed clock frequency of 50 MHz Designed to RMII Consortium specification 
  • Free core provided with the Embedded Development Kit (EDK)

Specifications

Identity

Part Number
Reduced Media Independent Interface (RMII)
Vendor
Xilinx, Inc.
Type
Silicon IP

Files

Note: some files may require an NDA depending on provider policy.

Provider

HQ: USA

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Frequently asked questions about Ethernet IP cores

What is Reduced Media Independent Interface (RMII)?

Reduced Media Independent Interface (RMII) is a Ethernet IP core from Xilinx, Inc. listed on Semi IP Hub.

How should engineers evaluate this Ethernet?

Engineers should review the overview, key features, supported foundries and nodes, maturity, deliverables, and provider information before shortlisting this Ethernet IP.

Can this semiconductor IP be compared with similar products?

Yes. Buyers can compare this product with similar semiconductor IP cores or IP families based on category, provider, process options, and structured technical specifications.

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