The MI2CM macro implements a synchronous single-chip I2C Master only Macro capable of linking one CPU to one I2C-bus.
- I2C / I3C
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Low-Speed Control Interface IP cores provide the communication, control, monitoring, and management functions required by modern SoCs, microcontrollers, automotive systems, industrial equipment, and embedded platforms. These interfaces enable reliable connectivity between processors, sensors, peripherals, power-management devices, and external subsystems.
This catalog includes IP solutions for widely adopted control and management protocols such as I2C/I3C, SPI/QSPI/xSPI, UART, CAN, CAN FD, CAN XL, LIN, GPIO, IEEE 1588/PTP, MIPI RFFE, PMBus, Smartcard, ARINC 429, MIL-STD-1553, FlexRay, SENT, HDLC, and other specialized interfaces. Compare controller, target, and protocol IP offerings from multiple vendors based on standards compliance, feature sets, safety support, performance, and integration requirements.
The MI2CM macro implements a synchronous single-chip I2C Master only Macro capable of linking one CPU to one I2C-bus.
The MI2CMS macro implements a synchronous single-chip I2C Master and Slave Macro capable of linking one CPU to one I2C-bus.
ARINC 429 Synchronous Transmitter Receiver
The M429T1R1 macro implements a synchronous single-chip ARINC 429 Transmit and Receive Controller Macro capable of linking one CP…
Serial protocol Interface Slave
The MSPIS IP implements a synchronous a single-chip SPI Slave IP capable of high speed serial data transfer with one SPI master.
Universal Asynchronous Receiver Transmitter
The macro M16450, implements a synchronous universal asynchronous receiver/transmitter, which provides an interface between a mic…
The FlexRay Controller fully complies with FlexRay Communication System Protocol Specification, Version 2.1, Revision A.
Protocol controller IP for CAN / CAN FD
The M_CAN module is the new CAN Communication Controller IP-module that can be integrated as stand-alone device or as part of an …
CAN 2.0 B Compatible Network Controller
The logiCAN core provides all features expected from the standard CAN network controller.
Universal Asynchronous Receiver / Transmitter
The macro M16550, implements a synchronous universal asynchronous receiver/transmitter, which provides an interface between a mic…
SmartDV’s MIL-STD-1553 Controller IP is a silicon-proven, fully featured avionics data bus solution purpose-built for defense, ae…
Arasan’s xSPI/PSRAM interface PHY is designed to work with both the xSPI or PSRAM master host controller IPs.
The TS_CAN_3V3_X8 is a 3.3V CAN transceiver, which supports data rates up to 1Mbps and is compatible with ISO 11898-2 compliant C…
The Controller Area Network (CAN) is a reliable serial bus protocol defined in the Bosch CAN specifications for standard CAN 2.0B…
Avalon compliant I²C Master IP core provides an interface between Nios II processor and an I²C Slave device.
The M429GEN IP implements a synchronous single-chip ARINC 429 Transmit and Receive Controller capable of linking one CPU to one o…
The Improved Inter Integrated Circuit (I3C) is part of a group of communication protocols defined by the MIPI Alliance.
I2C (Inter-Integrated Circuit) bus Interface serves as an interface between the microcontroller and the serial I2C bus.
Controller Area Network with Flexible Data rate
The XKAN module is a communication controller implementing the CAN protocol specification version 2.0 part A, B and CAN with Flex…
General Purpose Input/Output controller
The Nuclei LGPIO (Logic general-purpose I/Os) describes the operation of the Logic General Purpose Input/Output Controller(LGPIO).
Full duplex asynchronous communications
The USART (Universal Synchronous Asynchronous Receiver Transmitter) offers a flexible means of full-duplex data exchange with ext…