Vendor: Logic Design Solutions Category: ARINC 429

ARINC 429 Synchronous Transmitter Receiver

The M429T1R1 macro implements a synchronous single-chip ARINC 429 Transmit and Receive Controller Macro capable of linking one CP…

Contact Provider Request Datasheet

Overview

The M429T1R1 macro implements a synchronous single-chip ARINC 429 Transmit and Receive Controller Macro capable of linking one CPU to one ARINC 429 bus. The macro controls all ARINC 429 bus specific sequences, protocol and timing. The M429T1R1 macro interface allows the parallel-bus microprocessor to communicate bidirectionally with the ARINC 429 bus. This macro can be customized according to specific needs (application-specific requirement). Any other pre-designed functions can be integrated into the FPGA. FPGA density and I/O requirements can be defined according to customer specification.

Key features

  • 1 Independent Receivers (Rx) with FIFO
  • 1 Independent Transmitter (Tx) with FIFO
  • Decoding signals interface type
  • 16-Bit Data-bus
  • Direct addressing of all Registers
  • ARINC 429 Interface : ‘1’ and ‘0’ Lines, RZ code
  • Support all ARINC 429 Data Rate Transfer and up to 2.5 Mbit/s
  • Multi Label Capability
  • Parity Control : Odd, Even, No Parity, Interrupt Capability
  • Independent Interrupt Request Line for Rx and Tx Functions
  • FPGA speed grade operating frequency dependant : system clock up to 70 MHz
  • Available in VHDL source code format for ease of customization
  • DO254 design, verification and traceability documentation available on request
  • Can be customized by Logic Design Solutions

What’s Included?

  • VHDL Source code
  • VHDL Test Bench for behavioural and gate level simulation.
  • Data Sheet and Reference GuideUser’s guide : Simulation, Synthesis and Place and Route procedures.
  • Constraint File
  • DO254 Documentation available on request.

Specifications

Identity

Part Number
M429T1R1
Vendor
Logic Design Solutions
Type
Silicon IP

Files

Product Sheet Download

Note: some files may require an NDA depending on provider policy.

Provider

Contact Logic Design Solutions

Learn more about ARINC 429 IP core

Time Sensitive Networking for Aerospace

This white paper highlights the integration of Time-Sensitive Networking (TSN) in the aerospace industry. It provides an overview of TSN standards and profiles and the IEEE P802.1DP standard relevant to aerospace applications. It also discusses key topics such as time synchronization, latency, resource management, and reliability in the context of TSN.

Frequently asked questions about ARINC-429 IP cores

What is ARINC 429 Synchronous Transmitter Receiver?

ARINC 429 Synchronous Transmitter Receiver is a ARINC 429 IP core from Logic Design Solutions listed on Semi IP Hub.

How should engineers evaluate this ARINC 429?

Engineers should review the overview, key features, supported foundries and nodes, maturity, deliverables, and provider information before shortlisting this ARINC 429 IP.

Can this semiconductor IP be compared with similar products?

Yes. Buyers can compare this product with similar semiconductor IP cores or IP families based on category, provider, process options, and structured technical specifications.

×
Semiconductor IP