ESD diode and Clamps for 90nm TSMC G/GT/LP
Stand alone ESD diodes and Supply clamping for TSMC 90nm G/GT/LP processes
- TSMC
- 90nm
- LP
ESD Protection Library IP cores provide the pad-level interface between silicon and the package or board environment in modern SoC and ASIC designs.
These IP cores support pad and protection structures that harden chip interfaces against electrostatic discharge events, helping designers create robust I/O implementations across digital, analog, and high-speed domains
This catalog allows you to compare ESD Protection Library IP cores from leading vendors based on signal integrity, robustness, integration fit, and process node compatibility.
Whether you are designing all chip I/O domains, industrial products, consumer devices, or automotive electronics, you can find the right ESD Protection Library IP for your application.
ESD diode and Clamps for 90nm TSMC G/GT/LP
Stand alone ESD diodes and Supply clamping for TSMC 90nm G/GT/LP processes
TSMC 7nm 0V75 / 0V9 ESD Local Clamp – Low Cap
This specific IP macro is designed in TSMC 7nm and can be ported to other technologies upon request using Sofics in-house design tool flow.
TSMC 65nm 3V3 ESD Local Clamp – Rad Hard
This specific IP macro is designed in TSMC 65nm and can be ported to other technologies upon request using Sofics in-house design tool flow.
TSMC 5nm 1V8, 1.2V and 0.9V ESD Local Protection – Low Cap
This TSMC 3nm 1.8V, 1.2V and 0.9V ESD Local Protection IP provides low-capacitance, low-leakage protection for sensitive I/O and interface pins.
This TSMC 3nm 3.3V ESD Local Clamp provides compact, low-capacitance on-chip ESD protection for sensitive I/O and interface pins.
TSMC 3nm 1V2 ESD Local Clamp – Low Capacitance
This TSMC 3nm 1.2V ESD Local Clamp provides low-capacitance, low-leakage on-chip ESD protection for sensitive I/O and high-speed interface pins.
TSMC 22nm 5V5 ESD Power Clamp – Low Leakage
This TSMC 22nm 5.5V ESD Power Clamp provides low-leakage protection for sensitive supply and interface pins.
This specific IP macro is designed in TSMC 12nm and can be ported to other technologies upon request using Sofics in-house design tool flow.
This TSMC 12nm 2.5V ESD Power Clamp IP macro provides compact, low-leakage ESD protection for FinFET designs.
This specific IP macro is designed in TSMC 12nm and can be ported to other technologies upon request using Sofics in-house design tool flow.
TSMC 12nm 0V8 ESD Local Protection Low Cap
This TSMC 12nm 0.8V ESD Local Protection IP provides low-capacitance, low-leakage protection for sensitive I/O and interface pins.
SMC 2nm 1V8 ESD Power Clamp – Low Leakage
Silicon-proven ESD protection for GAA/nanosheet technologies
TSMC 2nm 1V8 ESD Local Clamp – Low Leakage
Silicon-proven ESD protection for GAA/nanosheet technologies
ESD Solutions for Multi-Gigabit SerDes in TSMC 28nm
A Wirebond and FlipChip compatible
Over-voltage Protection Module
Over-voltage Protection Module enabling direct connection of voltage regulators to 5.5 V batteries with standard 1.8 V I/O devices
Dolphin Design provides a Power Management IPs platform, toward three objectives: To standardize and ease Power Regulation Networ…
Dolphin Design provides a Power Management IPs platform, toward three objectives: To standardize and ease Power Regulation Networ…
Dolphin Design provides a Power Management IPs platform, toward three objectives: To standardize and ease Power Regulation Networ…
Over-voltage Protection Module to handle direct connection of voltage regulators to a 5V battery using standard IO devices
Over-voltage Protection Module to handle direct connection of voltage regulators to a 5V battery using standard 2.5 OD 3.3V devic…