ADC IP cores (Analog-to-Digital Converter IP) convert analog signals into digital data in modern SoC and ASIC designs, enabling interaction with real-world signals such as sensors, audio, and RF inputs.
These IP cores support various architectures including SAR ADC, pipeline ADC, and sigma-delta ADC, each optimized for different trade-offs between speed, resolution, and power consumption.
This catalog allows you to compare ADC IP cores from leading vendors based on resolution (bits), sampling rate, power efficiency, and process node compatibility.
Whether you are designing sensor interfaces, audio systems, industrial control applications, or RF front-ends, you can find the right ADC IP for your design.
18-bit Sigma Delta Stereo Audio Analog-to-Digital Converter IP in TSMC 28nm
AD18SD28HPC is a low-cost stereo analog to digital converter for digital audio applications.
14b, 1.3Gsps, 40MHz BW ADC in TSMC 28nm
AD14B40M28HPC is a wide band continuous time sigma delta ADC with -80dBc of dynamic range in 40Mhz bandwidth.
This ADC has 9bit resolution and can support sample rates from DC to 12.5MS/s, this design can be used for a variety of applicati…
90nm 9-bit ultra-low power ADC
Imec offers a white-box IP license with support on a low power 9bit 10MS/s SAR ADC in 90nm CMOS.
Imec offers a white-box IP license with support on a low power 13bit 6.4MS/s SAR ADC in 40nm CMOS.
90nm 7 to 10 bit flexible SAR ADC
Imec offers a white-box IP license with support on a low power 7-to-10bit 0-to-8MS/s SAR ADC in 90nm CMOS.
5 MHz 14-bit 1-channel 300 kSPS cascade delta-sigma ADC
The block is fourth order cascade (2-2) delta-sigma ADC with 5-level quantizers in both stages.
5 MHz 14-bit 2 channel 300 kSPS cascade delta-sigma ADC
The block is fourth order cascade (2-2) delta-sigma ADC with 5-level quantizers in both stages.
12-bit 1-channel 44/70/90 MSPS pipeline ADC
180TSMC_ADC_13 is a low-power high-speed 12 bit ADC that employs high-performance differential pipeline architecture.
The nSAD_TS180_1V8_AD12b2M is a 12b 2MS/s, 11 ENOB, low-power SAR fully-differential AD converter designed on the TSMC 180 proces…
12-bit 1-channel 20 to 100 MSPS ADC
The low-power high-speed 12-bit ADC employs a high-performance differential pipeline architecture.
12-bit 1-channel 4 MSPS SAR ADC
065TSMC_ADC_10 employs high-performance differential successive approximation architecture with sub-ranging and output offset com…
12-bit 4-channel 20 to 100 MSPS ADC
Quad-channel 12-bit 20 – 100 MSPS ADC contains four ADC channels, LVDS receiver, reference voltages and reference currents circui…
The 10-bit 100 MSPS ADC employs a high-performance front-end sample-and-hold with differential multi-stage pipelined architecture…
AGAD11 is a 10bit 100MSPS pipeline A/D converter.
12-bit 800 kSPS cascade delta-sigma ADC
The block is third order cascade (2-1) delta-sigma ADC with 5-level quantizers in both stages.
14-bit 1-channel 100/125 MSPS pipeline ADC
The high-speed 14-bit ADC employs a high-performance differential pipeline architecture.
14-bit 1-channel 50 MSPS pipeline ADC
The ADC has built on pipelined architecture.
10-bit 1-channel 1 MSPS SAR ADC
090TSMC_ADC_02 is a 10-bit 1-channel successive-approximation register (SAR) analog to digital converter (ADC) circuit with sampl…
14-bit 1-channel 50 MSPS pipeline ADC
This ADC has architecture of pipelined ADC, pipeline ADC consists of a cascade of stages, each stage of the pipeline, excluding t…