Optimized for machine learning, video and imaging workloads
- DSP Core
Compute and acceleration IP cores are specialized hardware blocks designed to improve performance and efficiency in modern SoC and ASIC designs.
This category covers a diverse ecosystem of processing technologies, including CPU and microcontroller cores for embedded control and software execution, AI/ML accelerators for neural network processing, DSP and math engines for real-time signal processing, data compression accelerators for efficient storage and communications, and eFPGA fabrics that provide post-silicon flexibility and hardware reconfigurability.
Whether you are designing for edge AI, automotive systems, consumer electronics, or data center acceleration, you can identify the right IP to optimize your system performance.
Optimized for machine learning, video and imaging workloads
The second-generation high-performance RISC-V CPU delivers a major leap in compute capability, designed for deployment across dat…
The ASIL B or D Ready ARC NPX6FS NPUs enable automotive system-on-chip (SoC) designers to accelerate ISO 26262 certification of D…
Maintains a database of outstanding orders.
Low-Power Deeply Embedded RISC-V Processor
The BA53 is a configurable, low-power, deeply-embedded RISC-V processor IP core.
SEC 5nm LVH 6T Multi-Bits Latch
SEC 5nm LVH 6 track High Density Multi-Bits Latch
IP
CCSDS AR4JA LDPC
Highly efficient out-of-order RISC-V vector application processor series
The SiFive Performance™ P400-Series application processors are SiFive’s first efficiency-focused Out-of-Order processors.
Infrastructure for Next-Generation Throughput Demands The Neoverse E1 processor is a new class of efficient CPU technology design…
A Revolution in High Performance Computing The Neoverse V1 CPU is designed to deliver per-core performance on demanding HPC, HPC …
Industry- Performance and Power Efficiency for Cloud-to-Edge Infrastructure Our first Armv9 infrastructure CPU, Neoverse N2 offer…
PNU is a stand-alone Coprocessor capable of doing real-number computation on posit operands.
CRISP is a CPU Core built by integrating our PNU with 64-bit RISC-V Processor.
The ASIL B or D Ready ARC NPX6FS NPUs enable automotive system-on-chip (SoC) designers to accelerate ISO 26262 certification of D…
10-input testmux, with LU protection at output
10-input testmux, has LU protection at output, can be used at chip I/O
21-input testmux, with LU protection at output
21-input testmux, has LU protection at output, can be used at chip I/O
RF Counter, 8b, up to 10GHz, Idd=600uA
Asynchronous Sample Rate Converter (ASRC) 2 channels
The sASRC-SW1.01 is part of Dolphin digital audio IP & multi-channel ASRC family and can be used to interface various audio block…
Asynchronous Sample Rate Converter (ASRC) 8 channels
The octASRC-SW1.01 is part of Dolphin digital audio IP & multi-channel ASRC family and can be used to interface various audio blo…