Beyond the CPU and GPU: SiFive in Datacenter Infrastructure
How embedded RISC-V processors in NICs, retimers, optics, switches, and security chips are overcoming modern scaling limits
Vendor:
Sifive, Inc.
Category:
DSP Core
Powerful AI processor
optimized for generative AI applications running Transformer based NN models that enables efficient and simple system designs.
Overview
Highly optimized for generative AI applications running Transformer based NN models that enables highly efficient and simple system designs. Ideal companion to custom NN hardware accelerators using high-throughput VCIX interface.
Market leading performance/power efficiency with RISC-V Vectors, full AI solution with optimized libraries, OpenXLA, compilers and support of Frameworks and NN models.
Market leading performance/power efficiency with RISC-V Vectors, full AI solution with optimized libraries, OpenXLA, compilers and support of Frameworks and NN models.
Key features
- SiFive Intelligence Extensions for ML workloads
- Custom instructions to greatly accelerate Neural Network computation
- Optimized TensorFlow Lite implementation
- Hundreds of Neural Network models ported
- 4.6 TOPS performance
- 512-bit VLEN
- Single Vector ALU
- VCIX (1024-bit)
- Performance benchmarks
- 5.75 CoreMarks/MHz
- 3.25 DMIPS/MHz
- 4.6 SpecINT2k6/GHz
- Built on silicon-proven U7-Series core
- 64-bit RISC-V ISA
- 8-stage dual-issue in-order pipeline
- Coherent multi-core, Linux capable
- High performance vector memory subsystem
- Memory parallelism provides cache miss tolerance
- Virtual memory support with precise exceptions
- Up to 48-bit addressing
- Multi-core, multi-cluster processor configuration, up to 8 cores
Specifications
Identity
Part Number
Intelligence X380
Vendor
Sifive, Inc.
Type
Silicon IP
Files
Note: some files may require an NDA depending on provider policy.
Provider
HQ:
USA
Learn more about DSP Core IP core
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How programmable RISC-V solutions optimize, control and direct custom accelerator functionality, unlocking the next generation of AI performance with SiFive intelligent control.
SiFive and AMD Collaborate to Optimize AMD ROCm on RISC-V Datacenter Servers
In a demonstration-only system, the companies showed the ability to run the modern Gemma4-E2B LLM model using ROCm 10.0 on SiFive servers powered by the SiFive Performance™ P870-D CPUs acting as the head node, and AMD Radeon™ AI PRO R9700 GPUs driving the inference offload.
SiFive Perspective: RISC-V SPMP Specification Ratification is a Leap Forward for Embedded Security
The broader RISC-V standards process continues to deliver innovation that responds dynamically to evolving market needs. If you didn’t see the announcement, in an important milestone for the open hardware ecosystem, the RISC-V Board of Directors officially ratified the S-mode Physical Memory Protection (SPMP) version 1.0 specification on August 20, 2026.
SiFive Paves the Path to Accelerated Adoption of RISC-V in the Datacenter with the BigSky Development Server
Powered by SiFive’s latest RISC-V CPU technology, the new development platform enables hands-on software porting, workload tuning, and validation testing for hyperscaler customers and ecosystem partners
Introducing SKL: The SiFive Kernel Library
We’re thrilled to announce the launch of the SiFive Kernel Library or SKL (pronounced “skill”), an open-source collection of highly-optimized computational routines for the RISC-V Vector ISA (RVV) and its various extensions, including SiFive’s matrix engines.
Frequently asked questions about DSP Core IP cores
What is Powerful AI processor?
Powerful AI processor is a DSP Core IP core from Sifive, Inc. listed on Semi IP Hub.
How should engineers evaluate this DSP Core?
Engineers should review the overview, key features, supported foundries and nodes, maturity, deliverables, and provider information before shortlisting this DSP Core IP.
Can this semiconductor IP be compared with similar products?
Yes. Buyers can compare this product with similar semiconductor IP cores or IP families based on category, provider, process options, and structured technical specifications.