Overview
The highest performance RISC-V core is ideal for consumer applications or used in conjunction with a vector processor in the datacenter. The P870 sets an impressive, new RISC-V performance bar across instruction availability, throughput, parallelism and memory bandwidth.
Bringing a 50% peak single thread performance upgrade (specINT2k6) over the previous generation Performance processors, the P870 is a six-wide, out-of-order core, meeting RVA 23, with a shared cluster cache enabling up to a 32-core cluster. High execution throughput comes with more instruction sets per cycle, more ALU and more branch units.
The P870A is designed for Automotive applications. For more information contact your sales representative.
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In a demonstration-only system, the companies showed the ability to run the modern Gemma4-E2B LLM model using ROCm 10.0 on SiFive servers powered by the SiFive Performance™ P870-D CPUs acting as the head node, and AMD Radeon™ AI PRO R9700 GPUs driving the inference offload.
The broader RISC-V standards process continues to deliver innovation that responds dynamically to evolving market needs. If you didn’t see the announcement, in an important milestone for the open hardware ecosystem, the RISC-V Board of Directors officially ratified the S-mode Physical Memory Protection (SPMP) version 1.0 specification on August 20, 2026.
Powered by SiFive’s latest RISC-V CPU technology, the new development platform enables hands-on software porting, workload tuning, and validation testing for hyperscaler customers and ecosystem partners
We’re thrilled to announce the launch of the SiFive Kernel Library or SKL (pronounced “skill”), an open-source collection of highly-optimized computational routines for the RISC-V Vector ISA (RVV) and its various extensions, including SiFive’s matrix engines.