Arm Cortex-M7

The Cortex-M7 processor enables partners to build the most sophisticated variety of MCUs and embedded SoCs. It has been designed to deliver a very high level of performance, while maintaining the excellent responsiveness and ease-of-use of the Armv7-M architecture.

Its industry leading high-performance and flexible system interfaces are ideal for a wide variety of application areas, including automotive, industrial automation, medical devices, high-end audio, image and voice processing, sensor fusion, advanced motor control and in the deployment of the Internet of Things (IoT).

• Optional instruction and data TCMs up to 16MB - Fast access to critical code and data via a dedicated bus. Increases responsiveness to critical events.
• Harvard instruction cache and data cache on 64-bit AMBA 4 AXI interface - Optimises access to large external memories or slow peripherals, reducing latency. Instruction and data caches are optional and separately configurable from 4KB to 64KB.
• SIMD, saturating arithmetic, fast MAC - Powerful instruction set for accelerating DSP applications, built right into the processor. A highly optimised DSP library built using these instructions is available free-of-charge from the Arm website.
• Powerful debug and non-obtrusive real-time trace, with optional full data trace - Comprehensive debug and trace features dramatically improve developer productivity. It is extremely efficient to develop embedded software with proper debug.
• Memory Protection Unit (MPU) - Software reliability improves when each module is allowed access only to areas of memory required for it to operate. This protection prevents unexpected access that may overwrite critical data.
• Integrated nested vectored interrupt controller (NVIC) - There is no need for a standalone external interrupt controller. Interrupt handling is taken care of by the NVIC removing the complexity of managing interrupts manually via the processor.

• Highest performance Cortex-M processor delivering best in class integer, floating point and DSP performance.
• Low-power processor design with extensive clock and power gating, customizable to minimize power consumption and high energy efficiency.
• Flexible system and memory interfaces including AXI, AHB, caches and tightly-coupled memories.
• Safety-critical requirement support, with features like error recovery through memory Error Correction Code (ECC), full data trace, and full safety documentation.
• C friendly programmer’s model and 100% binary compatible with existing Cortex-M3 and Cortex-M4 processors.

• Audio processing
• Automotive
• Industrial automation
• Sensor fusion
• Image and video processing
• Advanced motor control