Power management IP cores are essential components in modern SoC and ASIC designs, enabling efficient power regulation, distribution, and energy optimization.
These IP cores include functions such as voltage regulators, DC-DC converters, LDOs, battery management, and power monitoring, ensuring reliable and energy-efficient system operation.
This catalog allows you to compare power management IP cores from leading vendors based on efficiency, power consumption, integration level, and process node compatibility.
Whether you are designing mobile devices, automotive systems, IoT products, or high-performance computing platforms, you can find the right power management IP for your system.
40mA, Capless High PSRR LDO Regulator for RF and Analog Applications in TSMC 28nm
LDO28HPC40mA is a linear regulator capable of supplying 40mA of regulated output current with programmable output voltages of 0.9…
This USB/AC Li-Ion battery charger is targeted for portable applications.
ULP Bandgap Voltage Reference - 210nA consumption, 40ppm/ºC - Silterra 0.18um
This macro-cell is an ultra-low-power bandgap voltage reference (1.23V) with low temperature coefficient (>40ppm/ºC) consuming 21…
Power management unit (1.2 V output voltage, 945 nA output current)
065TSMC_PMU_01 is designed to supply embedded integrated circuits with stable and precise internal voltage and currents.
5 V Fixed Micro-power Low Dropout Linear Voltage Regulator
TI-L500 is a micro-power low dropout linear voltage regulator of XC06 HV technology.
Low-Noise Bandgap Reference - Low Noise: 63nV/√Hz, PSRR: -80dB - TSMC 0.18um CMOS (CLM18)
This macro-cell is a low noise, high PSRR voltage reference core designed for TSMC 0.18um (CLM18) CMOS technology.
General Purpose PMU - Thermal shutdown and overvoltage protected - SilTerra 0.18 um
This macro-cell is a Power Management Unit (PMU) core designed for Silterra 0.18µm C18GH5 CMOS technology in TO (thick oxide) and…
Bandgap Voltage Reference - Low Integrated Noise (57.2µVrms) -TSMC 40nm
This macro-cell is a low power voltage reference generator core designed for TSMC 40nm CRN40LP CMOS technology.
16nA Resistive Current Bias Low Voltage (1.0V), Low Power (360nW @ 1.2V)
This macro-cell is a low power general purpose current bias generator core designed for SilTerra 0.18µm CL180G CMOS technology.
17nA Current Bias with Enable Low Voltage (1.0V), Ultra Low Power (90nW @ 1.8V)
This macro-cell is a low power general purpose current bias generator core designed for TowerJazz 0.18µm TS18SL CMOS technology.
The CC-100 IP is a Hyper-decoupling capacitor with a Capacitance Multiplication, Series Inductance Nullification, Cybersecurity E…
1.2 V Bandgap voltage reference
Bandgap voltage reference forms temperature-compensated voltage level equal to the width of the band gap of silicon due to mutual…
0.6 V Bandgap voltage reference
Bandgap voltage reference forms temperature-compensated voltage level due to mutual compensation of temperature dependence of bip…
Bandgap voltage reference (output voltage 0.4 V)
The bandgap voltage reference generates temperature-compensated voltage due to mutual compensation of temperature dependence of b…
30 mA flash LDO voltage regulator (output voltage 1.8 V)
The voltage regulator consists of a differential amplifier, pass transistor and resistor's divider.
30 mA LDO voltage regulator (output voltage 0.9 to 1.3 V)
055GF_LDOVR_03 the voltage regulator is used to maintain a stable output voltage at varying input voltage.
2 mA LDO voltage regulator (output voltage 1.2 V)
The voltage regulator consists of a differential amplifier, pass transistor and resistor's divider.
The block consists of voltage detector, power on reset and NOR3 gate.
065TSMC_PoR_02 is a Power-on-Reset (PoR) circuit provides a reset signal to the chip when supply voltage reach required level.
1.2 V Bandgap voltage reference
Bandgap voltage reference forms temperature-compensated voltage level equal to the width of the band gap of silicon due to mutual…