This macro-cell is a low power voltage reference generator core designed for TSMC 40nm CRN40LP CMOS technology.
This macro-cell is a low power voltage reference generator core designed for TSMC 40nm CRN40LP CMOS technology. The core is ideal as a general purpose reference voltage in applications where low output noise and wide PSRR band are critical.
The circuit generates an unbuffered 570mV, temperature compensated bandgap voltage reference (57ppm/ C). Internal start-up circuit allows the reference is available as soon as the power supply ramps up, so none enable/disable function is necessary to start it up. It has three trimming bits for the coeficient temperature. It has a general purpose 3.2µA PTAT output current.
The core is easily re-targeted to any other CMOS technology.
| Foundry | Node | Process | Maturity |
|---|---|---|---|
| TSMC | 40nm | G | — |
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Bandgap Voltage Reference - Low Integrated Noise (57.2µVrms) -TSMC 40nm is a Voltage Reference IP core from Chipus Microelectronics listed on Semi IP Hub. It is listed with support for tsmc.
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