065TSMC_PMU_01 is designed to supply embedded integrated circuits with stable and precise internal voltage and currents.
065TSMC_PMU_01 is designed to supply embedded integrated circuits with stable and precise internal voltage and currents. It integrates power switch element, LDO, Bangap and Power On Reset block. PMU have controllable input voltage level and are complemented with VDD detectors to monitor the input voltage value. Two modes are available: full power mode and battery mode. If IO power voltage enable then LDO supply powered by 2.5V, if IO power voltage disable then LDO supply powered by battery power. The voltage regulator consists of a differential amplifier which compares reference voltage with voltage from a feedback divider. It adjusts the impedance of a PMOS transistor for stabilization of output voltage at a set level. PMU have Power On Reset block which generate logic level signal to control LDO power supply.
| Foundry | Node | Process | Maturity |
|---|---|---|---|
| TSMC | 65nm | GP | Silicon Proven |
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Power management unit (1.2 V output voltage, 945 nA output current) is a Power Management Unit IP core from NTLab listed on Semi IP Hub. It is listed with support for tsmc Silicon Proven.
Engineers should review the overview, key features, supported foundries and nodes, maturity, deliverables, and provider information before shortlisting this Power Management Unit IP.
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